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| author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2015-09-10 07:03:25 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-09-14 19:47:31 +0100 |
| commit | 5c6901d98b35c3192336e419344f0f22f86b8845 (patch) | |
| tree | 231f83d3affa3634afcee574dab1fa8517d13dcc /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | f1df12290722f998f5eb173ae30434d313aea54c (diff) | |
ASoC: rsnd: ADG initial setup on rsnd_adg_ssi_clk_init()
ADG is special IP since it doesn't have MSTP. And now, ADG has common
mod base register access. We can now setup ADG initial setting when
probe timing. It is needed if sound card is based on AUIDO_CLK which
is used as Master clock.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions