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authorRamesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>2016-06-17 13:25:14 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2016-06-21 09:21:06 +0200
commit7d6cc0cddbc2f1953b2ff6f5930a065e40b94507 (patch)
treeb2d1f4299fe07f90576133492228dbeed49a68b5 /tools/perf/scripts/python/export-to-postgresql.py
parentf7bb887fb898307dd575179303b710d933f242ea (diff)
clk: renesas: r8a7795: Add DRIF clock
This patch adds DRIF module clocks for r8a7795 SoC. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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