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authorStefan Agner <stefan@agner.ch>2016-10-05 14:37:57 -0700
committerStefan Agner <stefan@agner.ch>2016-10-19 17:02:59 -0700
commit9789037695018e25902469ea0e540c07580b940f (patch)
tree14d5dc8e8eaff89dc4c1bb2421dcaee633047f48 /tools/perf/scripts/python/export-to-postgresql.py
parentb6ead864ea893ef55828be0ec0d6c10f7c1c4e30 (diff)
drm/fsl-dcu: do not transfer registers in mode_set_nofb
Do not schedule a transfer of mode settings early. Modes should get applied on on CRTC enable where we also enable the pixel clock. Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-By: Meng Yi <meng.yi@nxp.com>
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