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authorFlorian Fainelli <f.fainelli@gmail.com>2021-10-29 14:09:26 -0700
committerFlorian Fainelli <f.fainelli@gmail.com>2021-11-15 19:09:47 -0800
commit98481f3d72fb88cb5b973153434061015f094925 (patch)
treefd880fe24b6ecad8c38cb5ac2f65da548cc2412a /tools/perf/scripts/python/export-to-postgresql.py
parent40f7342f0587639e5ad625adaa15efdd3cffb18f (diff)
ARM: dts: bcm2711: Fix PCIe interrupts
The PCIe host bridge has two interrupt lines, one that goes towards it PCIE_INTR2 second level interrupt controller and one for its MSI second level interrupt controller. The first interrupt line is not currently managed by the driver, which is why it was not a functional problem. The interrupt-map property was also only listing the PCI_INTA interrupts when there are also the INTB, C and D. Reported-by: Jim Quinlan <jim2101024@gmail.com> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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