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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2018-02-16 15:25:03 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-02-20 19:02:16 +0100
commitb418c4609d5052d174668ad6d13efe023c45c595 (patch)
treea08dd59826cc56937146c52faae4d290c1f642c7 /tools/perf/scripts/python/export-to-postgresql.py
parent740a4a3aa76ed46a425909ba34cc82c4ddb91252 (diff)
pinctrl: sh-pfc: r8a7796: Fix MOD_SEL register pin assignment for SSI pins group
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment for SSI pins group. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece7344bd ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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