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authorKieran Bingham <kieran.bingham@ideasonboard.com>2021-06-23 00:27:11 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-07-19 10:53:52 +0200
commitc346ff5ccc8e87f69a520073f876b740431a5acf (patch)
treede5645936c4d36277a6a0c216bc16c7c59e2ef4c /tools/perf/scripts/python/export-to-postgresql.py
parent417ed58dfc5ed6c2ec608d5ee93dd27197190e19 (diff)
clk: renesas: r8a779a0: Add the DSI clocks
The DSI clock is incorrectly defined as a fixed clock. This demonstrates itself as the dsi-encoders failing to correctly enable and start their PPI and HS clocks internally, and causes failures. Move the DSI parent clock to match the updates in the BSP, which resolves the initialisation procedures. Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com> Fixes: 17bcc8035d2d19fc ("clk: renesas: cpg-mssr: Add support for R-Car V3U") Link: https://lore.kernel.org/r/20210622232711.3219697-3-kieran.bingham@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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