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| author | Alistair Popple <apopple@nvidia.com> | 2020-10-30 13:36:45 +1100 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2021-01-29 16:49:13 +1000 |
| commit | f2fcb0692d6357f12f17a2f3fc3297ce6bab4e51 (patch) | |
| tree | cdf0bc8b545c808aa051d5e4affd5217e61b1312 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 26a0cfc163ab883bd4a5d7b6824bbfd0835e0e07 (diff) | |
drm/nouveau/fifo/tu102: Turing channel preemption fix
Previous hardware allowed a MMU fault to be generated by software to
trigger a context switch for engine recovery. Turing has the capability
to preempt all work from a specific runlist processor and removed the
registers currently used for triggering MMU faults. Attempting to access
these non-existent registers results in further errors, so use the
runlist preemption register instead.
Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions