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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2020-06-20 18:23:47 +0200 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2020-07-13 11:57:46 -0700 |
| commit | 32b5f4b63487a24712c3bfa1d6a8eb9257beb8bd (patch) | |
| tree | b1624a3f449e2c70ec871f23ef27f17e5188adfb /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 5273d6cacc067e7a8552e29cabddb4934f4e05b7 (diff) | |
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
Add the "timing-adjustment" clock now that we know how it is connected
to the PRG_ETHERNET registers. It is used internally to generate the
RGMII RX delay on the MAC side (if needed).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620162347.26159-1-martin.blumenstingl@googlemail.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions