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| author | Changbin Du <changbin.du@intel.com> | 2018-05-15 10:35:36 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2018-07-09 10:23:04 +0800 |
| commit | 40b271767dcf9748327619ed550be810cc2e10ae (patch) | |
| tree | 08df1e5c0e9e52a0fc56b307728d835554c60f25 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 52ca14e6844a04e174b5cd3d7dbf63a23271775c (diff) | |
drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDE
This change help us detect the real entry type per PSE and IPS setting.
For 64K entry, we also need to check reg GEN8_GAMW_ECO_DEV_RW_IA.
v2: Extend IPS mmio control to Gen10. (Matthew Auld)
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions