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author | Katsuhiro Suzuki <katsuhiro@katsuster.net> | 2018-11-18 13:16:12 +0900 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2018-11-19 14:39:29 +0100 |
commit | 5c73ac2f8b70834a603eb2d92eb0bb464634420b (patch) | |
tree | a78c64306bdf28fa1d3f7f7b50fb796be0cc0588 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | 8989e9d2e6484fe2131dd16fa31698154affef40 (diff) |
clk: rockchip: fix I2S1 clock gate register for rk3328
This patch fixes definition of I2S1 clock gate register for rk3328.
Current setting is not related I2S clocks.
- bit6 of CRU_CLKGATE_CON0 means clk_ddrmon_en
- bit6 of CRU_CLKGATE_CON1 means clk_i2s1_en
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions