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authorSai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>2021-09-24 15:37:10 +0530
committerMark Brown <broonie@kernel.org>2021-10-01 20:50:51 +0100
commit09e393e3f13970f194f7ed9a93140a8601225b46 (patch)
treed19aef66a69ed7e3ab12cf42b0f123a01f2cf35a /tools/perf/scripts/python/exported-sql-viewer.py
parent8db76cfae1004f5476d9c35670f0a0f084c6b73f (diff)
spi: cadence-quadspi: Add OSPI support for Xilinx Versal SoC
Add OSPI support for Xilinx Versal SoCs. Disable the Direct Access Controller for Xilinx Versal OSPI. On Xilinx Versal platform, AXI interface need to be selected as Linear mode (driven from interconnect rather than external DMA) to use Software triggered 'indirect' mode of operation. This will be achieved by calling Xilinx firmware API. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1632478031-12242-4-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Mark Brown <broonie@kernel.org>
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