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author | Linus Walleij <linus.walleij@linaro.org> | 2019-10-21 01:00:42 +0200 |
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committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-10-29 14:24:53 +0100 |
commit | 2aba2f2a704d368583e832555b25d88265e62b6d (patch) | |
tree | df3c5d069ce312563550a61032e3f486d22b5fdb /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | 8b3cc926223be73bb2ab5f9465f157fc27e06eca (diff) |
mtd: physmap_of: add a hook for Intel IXP4xx flash probing
In order to support device tree probing of IXP4xx NOR flash
chips, a certain big-endian or mixed-endian memory access
pattern need to be used.
I have opted to use the pattern set by previous plug-ins
to physmap for Gemini and Versatile, just override some
functions and reuse most of the physmap core code as it
is to minimize maintenance.
Parts of drivers/mtd/ixp4xx.c are copied into this file.
After we have IXP4xx converted fully to device tree, the
drivers/mtd/ixp4xx.c file will be deleted and this will
be the only access pattern to the IXP4xx flash.
I did not keep the quirk in the flash write function
after probe, where the old code for a while checks for
access to odd addresses, fails and assigns a "faster"
write function once it has convinced probe to only use
2-byte accesses. As we mandate that this device should
be using bank-width = <2> this should not be a problem
unless misconfigured.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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