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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-10-07 16:38:46 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-10-15 09:48:00 +0200 |
commit | 412da8c7224af6888ed8b2a94ee16bb34a4200a6 (patch) | |
tree | 02c0aa8acc452971480d45775896c005d94ddbd4 /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | ce34fb3cb4a8165a51a90d0ea437d75f34a6d031 (diff) |
pinctrl: renesas: Fix save/restore on SoCs with pull-down only pins
If some bits in a pin Pull-Up control register (PUPR) control pin
pull-down instead of pin pull-up, there are two pinmux_bias_reg entries:
a first one with the puen field filled in, listing pins with pull-up
functionality, and a second one with the pud field filled in, listing
pins with pull-down functionality. On encountering the second entry,
where puen is NULL, the for-loop terminates early, causing the remaining
bias registers not to be saved/restored during PSCI system suspend.
Fortunately this does not trigger on any supported system yet, as PSCI
is only used on R-Car Gen3 and RZ/G2 systems, which all have separate
pin Pull-Enable (PUEN) and pin Pull-Up/Down control (PUD) registers.
Avoid this ever becoming a problem by treating pinmux_bias_reg.puen and
pinmux_bias_reg.pud the same. Note that a register controlling both
pull-up and pull-down pins would be saved and restored twice, which is
harmless.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/59d2fbddff685b6a7a82ff17d2b37633e30e8860.1633615652.git.geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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