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authorPeter Zijlstra <peterz@infradead.org>2018-10-11 12:38:26 +0200
committerThomas Gleixner <tglx@linutronix.de>2018-10-14 11:11:22 +0200
commit4907c68abd3f60f650f98d5a69d4ec77c0bde44f (patch)
tree1a08e7f0fab0e26c4d8651598bb7450c8e3faeed /tools/perf/scripts/python/exported-sql-viewer.py
parent3a27203102ebfa67bd0bced05b1def499bb59db2 (diff)
x86/tsc: Force inlining of cyc2ns bits
Looking at the asm for native_sched_clock() I noticed we don't inline enough. Mostly caused by sharing code with cyc2ns_read_begin(), which we didn't used to do. So mark all that __force_inline to make it DTRT. Fixes: 59eaef78bfea ("x86/tsc: Remodel cyc2ns to use seqcount_latch()") Reported-by: Eric Dumazet <edumazet@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: hpa@zytor.com Cc: eric.dumazet@gmail.com Cc: bp@alien8.de Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20181011104019.695196158@infradead.org
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