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authorDavid E. Box <david.e.box@linux.intel.com>2021-04-16 20:12:50 -0700
committerHans de Goede <hdegoede@redhat.com>2021-04-19 10:44:28 +0200
commit8074a79fad2e34fce11ea2b2c515b984fc6b2a08 (patch)
tree773f0403659b3f270d28f548fa3ff3416b5246b4 /tools/perf/scripts/python/exported-sql-viewer.py
parent952c15538e5346fcb0548370f25380b7bc62ed40 (diff)
platform/x86: intel_pmc_core: Add option to set/clear LPM mode
By default the Low Power Mode (LPM or sub-state) status registers will latch condition status on every entry into Package C10. This is configurable in the PMC to allow latching on any achievable sub-state. Add a debugfs file to support this. Also add the option to clear the status registers to 0. Clearing the status registers before testing removes ambiguity around when the current values were set. The new file, latch_lpm_mode, looks like this: [c10] S0i2.0 S0i3.0 S0i2.1 S0i3.1 S0i3.2 clear Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20210417031252.3020837-8-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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