diff options
| author | chen gong <curry.gong@amd.com> | 2021-01-08 12:46:44 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-01-14 00:24:52 -0500 |
| commit | 04eb6e773e9f3167a5921d74e8ad99cdcc4166c3 (patch) | |
| tree | 8b84a621b4a958f7fedcb7c9eb304dd6e47ba385 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 8b335bff643f3b39935c7377dbcd361c5b605d98 (diff) | |
drm/amdgpu/gfx10: add updated GOLDEN_TSC_COUNT_UPPER/LOWER register offsets for VGH
The address of the GOLDEN_TSC_COUNT_UPPER/GOLDEN_TSC_COUNT_LOWER for
Vnagogh are different from the others.
The offset of the GOLDEN_TSC_COUNT_UPPER for Vangogh is 0x0025 by
calculation.
The offset of the GOLDEN_TSC_COUNT_LOWER for Vangogh is 0x0026 by
calculation.
Signed-off-by: chen gong <curry.gong@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions