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| author | Rafał Miłecki <rafal@milecki.pl> | 2021-09-13 10:00:21 +0200 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2021-11-05 14:38:51 +0000 |
| commit | 15fd4ca41d44b92966425b628eba12e475a484dc (patch) | |
| tree | 907808f80f489055eef8d50cc5aaa0329d5f5aed /tools/perf/scripts/python/stackcollapse.py | |
| parent | 3747a64179bff75fca38837516b2e91b7de8a36c (diff) | |
dt-bindings: mfd: brcm,cru: Add clkset syscon
CRU has a shared register that is used e.g. to control USB 2.0 PHY block
access. It's a single 32 b register. Document it as syscon so it can be
used with a regmap.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions