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| author | Zhen Lei <thunder.leizhen@huawei.com> | 2020-10-12 14:12:22 +0800 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2020-11-24 19:43:18 +0800 |
| commit | 4c246408f0bdbc4100c95a5dad9e0688b4a3cfd0 (patch) | |
| tree | fa5565f43eef4903632224cd4f54c68897a76d38 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 05484c171d39433daa8b75c0c4c5fb454091e9b7 (diff) | |
ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same
clock.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions