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| author | Jani Nikula <jani.nikula@intel.com> | 2021-03-02 13:03:01 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-03-04 07:50:15 +0200 |
| commit | 512005d949287c2a38f4d65f285b7fb9f8244ed0 (patch) | |
| tree | 61d45f68ceea0a2d9ebf4c2638167212cbbccf50 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 5bc4fab7e79206926718c3d39cb70cbee22ef4ac (diff) | |
drm/i915/edp: modify fixed and downclock modes for MSO
In the case of MSO (Multi-SST Operation), the EDID contains the timings
for a single panel segment. We'll want to hide the fact from userspace,
and expose modes that span the entire display.
Don't modify the EDID, as the userspace should not use that for
modesetting, only modify the actual modes.
v3: Use pixel overlap if available.
v2: Rename intel_dp_mso_mode_fixup -> intel_edp_mso_mode_fixup
Cc: Nischal Varide <nischal.varide@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/2862284eb033bb0ffc96134b7d5b11bf29e4587f.1614682842.git.jani.nikula@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions