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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2016-09-06 23:38:46 +0200
committerKevin Hilman <khilman@baylibre.com>2016-09-07 14:13:18 -0700
commit566e8251625304e291bc1e2e7d57850ccf0502f5 (patch)
treed7f0316c3c2ea5e7252fdabea9014785f5e1cc74 /tools/perf/scripts/python/stackcollapse.py
parent1b0acbfdb8a8884f18fdb2caa85b4beded2390fb (diff)
net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
The Ethernet controller available in Meson8b and GXBB SoCs is a Synopsys DesignWare MAC IP core which is already supported by the stmmac driver. In addition to the standard stmmac driver some Meson8b / GXBB specific registers have to be configured for the PHY clocks. These SoC specific registers are called PRG_ETHERNET_ADDR0 and PRG_ETHERNET_ADDR1 in the datasheet. These registers are not backwards compatible with those on Meson 6b, which is why a new glue driver is introduced. This worked for many boards because the bootloader programs the PRG_ETHERNET registers correctly. Additionally the meson6-dwmac driver only sets bit 1 of PRG_ETHERNET_ADDR0 which (according to the datasheet) is only used during reset. Currently all configuration values can be determined automatically, based on the configured phy-mode (which is mandatory for the stmmac driver). If required the tx-delay and the mux clock (so it supports the MPLL2 clock as well) can be made configurable in the future. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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