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authorGeert Uytterhoeven <geert+renesas@glider.be>2018-05-07 15:24:48 +0200
committerSimon Horman <horms+renesas@verge.net.au>2018-05-14 16:40:40 +0200
commitc02cc235a215e9c518f98da25753b9e02bb7144f (patch)
tree145a77ff41d8f2ead558aa30623aaa66cf0611fe /tools/perf/scripts/python/stackcollapse.py
parent7207b94754b6f503b278b5b200faaf662ffa1da8 (diff)
ARM: dts: r7s72100: Correct watchdog timer interrupt type
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the watchdog timer interrupt is a level interrupt. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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