diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-10-07 22:08:24 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2015-10-13 17:03:18 +0300 |
| commit | 8e7a65aa70bcc1235a44e40ae0da5056525fe081 (patch) | |
| tree | df12be3c597c742f5e3fff3419a78c78e2e1cd07 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 40a24488f5250d63341e74b9994159afc4589606 (diff) | |
drm/i915: Restore lost DPLL register write on gen2-4
We accidentally lost the initial DPLL register write in
1c4e02746147 drm/i915: Fix DVO 2x clock enable on 830M
The "three times for luck" hack probably saved us from a total
disaster. But anyway, bring the initial write back so that the
code actually makes some sense.
Reported-and-tested-by: Nick Bowler <nbowler@draconx.ca>
References: http://mid.gmane.org/CAN_QmVyMaArxYgEcVVsGvsMo7-6ohZr8HmF5VhkkL4i9KOmrhw@mail.gmail.com
Cc: stable@vger.kernel.org
Cc: Nick Bowler <nbowler@draconx.ca>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions