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| author | Mesih Kilinc <mesihkilinc@gmail.com> | 2019-02-11 12:21:08 +0300 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2019-05-02 21:55:58 +0200 |
| commit | 0113ab803a8aee00bc136507bcc9b16466f3c3aa (patch) | |
| tree | 29f53500be8c3344cc92c474f4633c5662808c97 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 67d06e6efa41c4135cfc4c4c5c9b55d5e3a9b6f7 (diff) | |
clocksource/drivers/sun4i: Add a compatible for suniv
The suniv (new F-series) chip has a timer with less functionality than
the A10 timer, e.g. it has only 3 channels.
Add a new compatible for it. As we didn't use the extra channels on A10
either now, the code needn't to be changed.
The suniv chip is based on ARM926EJ-S CPU, thus it has no architecture timer.
Register sun4i_timer as sched_clock on it.
Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions