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| author | Damien Lespiau <damien.lespiau@intel.com> | 2015-03-06 18:50:53 +0000 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-03-17 22:30:08 +0100 |
| commit | 1d2b9526a790d55b7ae870934a74937081f62de2 (patch) | |
| tree | 6aea0ca61ab79112f1a1416744ecb97c7a594cdd /tools/perf/scripts/python/syscall-counts.py | |
| parent | 254003926eed24344c23509a743d0bc281e0eb95 (diff) | |
drm/i915/skl: Restore the DDI translation tables when enabling PW1
I was dumping the DDI translation tables to make sure my patch updating
the HDMI entry was doing the right thing when I noticed that the table
was showing reset values after DPMS.
And indeed, the DDI translation registers are in power well 1 on SKL,
and so we're losing their values when shutting down eDP.
Calling intel_prepare_ddi() on PW1 enabling re-programs the table.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions