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authorYazen Ghannam <yazen.ghannam@amd.com>2019-06-07 20:18:04 +0000
committerBorislav Petkov <bp@suse.de>2019-06-11 15:22:41 +0200
commit95d057f54664f3c6e8f650faf5690b82b30a9e52 (patch)
tree565011bffe76bdd779c378c2b7d5eda6745368d9 /tools/perf/scripts/python/syscall-counts.py
parentb4914508f1fe0eca1cd011b6026ff762a1aa62d5 (diff)
x86/MCE/AMD: Don't cache block addresses on SMCA systems
On legacy systems, the addresses of the MCA_MISC* registers need to be recursively discovered based on a Block Pointer field in the registers. On Scalable MCA systems, the register space is fixed, and particular addresses can be derived by regular offsets for bank and register type. This fixed address space includes the MCA_MISC* registers. MCA_MISC0 is always available for each MCA bank. MCA_MISC1 through MCA_MISC4 are considered available if MCA_MISC0[BlkPtr]=1. Cache the value of MCA_MISC0[BlkPtr] for each bank and per CPU. This needs to be done only during init. The values should be saved per CPU to accommodate heterogeneous SMCA systems. Redo smca_get_block_address() to directly return the block addresses. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Cc: "x86@kernel.org" <x86@kernel.org> Link: https://lkml.kernel.org/r/20190607201752.221446-4-Yazen.Ghannam@amd.com
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