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| author | Gabriele Paoloni <gabriele.paoloni@huawei.com> | 2017-05-23 15:23:58 +0100 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-06-16 18:04:13 -0500 |
| commit | a1d5f18cafe6b81696e60ca4901709d2f807362c (patch) | |
| tree | 8f7cbc9c642cdd9fe11185d3429c74e9bfa1a416 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 2ea659a9ef488125eb46da6eb571de5eae5c43f6 (diff) | |
PCI/portdrv: Support multiple interrupts for MSI as well as MSI-X
Root Ports can generate several different interrupts using either MSI or
MSI-X, but we only support that for MSI-X. Ports that support MSI but not
MSI-X are currently limited to sharing a single interrupt.
Rename pcie_port_enable_msix() to pcie_port_enable_irq_vec() and extend it
to support multiple interrupts using either MSI-X (preferred) or MSI.
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
[bhelgaas: changelog, reword comments, simplify PME/hotplug no-MSI logic]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions