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authorLinus Walleij <linus.walleij@linaro.org>2017-05-15 19:23:12 +0200
committerBjorn Helgaas <bhelgaas@google.com>2017-07-02 18:42:35 -0500
commitd1ef28900d6607ea7a25c39a3bd1ce152f6ab24a (patch)
treea709d1e6d9e2ca8327bb45929ddf7ed3d40118b1 /tools/perf/scripts/python/syscall-counts.py
parent769b461fc0c0451bacf75826d5830fc07c5a57e4 (diff)
PCI: faraday: Add clock bindings
The Faraday FTPCI100 controller has two clock ports, PCLK and PCICLK. Add bindings for these two clocks so we can assign them in the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org>
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