diff options
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 5b5ca7ff6674..986ed249a733 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -955,6 +955,44 @@ status = "disabled"; }; + dsi: dsi@ff450000 { + compatible = "rockchip,px30-mipi-dsi"; + reg = <0x0 0xff450000 0x0 0x10000>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_MIPI_DSI>; + clock-names = "pclk"; + phys = <&dsi_dphy>; + phy-names = "dphy"; + power-domains = <&power PX30_PD_VO>; + resets = <&cru SRST_MIPIDSI_HOST_P>; + reset-names = "apb"; + rockchip,grf = <&grf>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dsi_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_dsi>; + }; + + dsi_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_dsi>; + }; + }; + }; + }; + vopb: vop@ff460000 { compatible = "rockchip,px30-vop-big"; reg = <0x0 0xff460000 0x0 0xefc>; @@ -972,6 +1010,11 @@ vopb_out: port { #address-cells = <1>; #size-cells = <0>; + + vopb_out_dsi: endpoint@0 { + reg = <0>; + remote-endpoint = <&dsi_in_vopb>; + }; }; }; @@ -1004,6 +1047,11 @@ vopl_out: port { #address-cells = <1>; #size-cells = <0>; + + vopl_out_dsi: endpoint@0 { + reg = <0>; + remote-endpoint = <&dsi_in_vopl>; + }; }; }; |