diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 957d401186d2..bf93344b8564 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2175,7 +2175,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg) gt_iir = raw_reg_read(regs, GTIIR); if (gt_iir) { raw_reg_write(regs, GTIIR, gt_iir); - if (INTEL_GEN(i915) >= 6) + if (GRAPHICS_VER(i915) >= 6) gen6_gt_irq_handler(&i915->gt, gt_iir); else gen5_gt_irq_handler(&i915->gt, gt_iir); @@ -2192,7 +2192,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg) ret = IRQ_HANDLED; } - if (INTEL_GEN(i915) >= 6) { + if (GRAPHICS_VER(i915) >= 6) { u32 pm_iir = raw_reg_read(regs, GEN6_PMIIR); if (pm_iir) { raw_reg_write(regs, GEN6_PMIIR, pm_iir); @@ -3039,7 +3039,7 @@ static void ilk_irq_reset(struct drm_i915_private *dev_priv) GEN3_IRQ_RESET(uncore, DE); dev_priv->irq_mask = ~0u; - if (IS_GEN(dev_priv, 7)) + if (GRAPHICS_VER(dev_priv) == 7) intel_uncore_write(uncore, GEN7_ERR_INT, 0xffffffff); if (IS_HASWELL(dev_priv)) { @@ -3658,7 +3658,7 @@ static void ilk_irq_postinstall(struct drm_i915_private *dev_priv) struct intel_uncore *uncore = &dev_priv->uncore; u32 display_mask, extra_mask; - if (INTEL_GEN(dev_priv) >= 7) { + if (GRAPHICS_VER(dev_priv) >= 7) { display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB | DE_PCH_EVENT_IVB | DE_AUX_CHANNEL_A_IVB); extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB | @@ -4328,7 +4328,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv) dev_priv->l3_parity.remap_info[i] = NULL; /* pre-gen11 the guc irqs bits are in the upper 16 bits of the pm reg */ - if (HAS_GT_UC(dev_priv) && INTEL_GEN(dev_priv) < 11) + if (HAS_GT_UC(dev_priv) && GRAPHICS_VER(dev_priv) < 11) dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16; if (!HAS_DISPLAY(dev_priv)) @@ -4399,18 +4399,18 @@ static irq_handler_t intel_irq_handler(struct drm_i915_private *dev_priv) return cherryview_irq_handler; else if (IS_VALLEYVIEW(dev_priv)) return valleyview_irq_handler; - else if (IS_GEN(dev_priv, 4)) + else if (GRAPHICS_VER(dev_priv) == 4) return i965_irq_handler; - else if (IS_GEN(dev_priv, 3)) + else if (GRAPHICS_VER(dev_priv) == 3) return i915_irq_handler; else return i8xx_irq_handler; } else { if (HAS_MASTER_UNIT_IRQ(dev_priv)) return dg1_irq_handler; - if (INTEL_GEN(dev_priv) >= 11) + if (GRAPHICS_VER(dev_priv) >= 11) return gen11_irq_handler; - else if (INTEL_GEN(dev_priv) >= 8) + else if (GRAPHICS_VER(dev_priv) >= 8) return gen8_irq_handler; else return ilk_irq_handler; @@ -4424,16 +4424,16 @@ static void intel_irq_reset(struct drm_i915_private *dev_priv) cherryview_irq_reset(dev_priv); else if (IS_VALLEYVIEW(dev_priv)) valleyview_irq_reset(dev_priv); - else if (IS_GEN(dev_priv, 4)) + else if (GRAPHICS_VER(dev_priv) == 4) i965_irq_reset(dev_priv); - else if (IS_GEN(dev_priv, 3)) + else if (GRAPHICS_VER(dev_priv) == 3) i915_irq_reset(dev_priv); else i8xx_irq_reset(dev_priv); } else { - if (INTEL_GEN(dev_priv) >= 11) + if (GRAPHICS_VER(dev_priv) >= 11) gen11_irq_reset(dev_priv); - else if (INTEL_GEN(dev_priv) >= 8) + else if (GRAPHICS_VER(dev_priv) >= 8) gen8_irq_reset(dev_priv); else ilk_irq_reset(dev_priv); @@ -4447,16 +4447,16 @@ static void intel_irq_postinstall(struct drm_i915_private *dev_priv) cherryview_irq_postinstall(dev_priv); else if (IS_VALLEYVIEW(dev_priv)) valleyview_irq_postinstall(dev_priv); - else if (IS_GEN(dev_priv, 4)) + else if (GRAPHICS_VER(dev_priv) == 4) i965_irq_postinstall(dev_priv); - else if (IS_GEN(dev_priv, 3)) + else if (GRAPHICS_VER(dev_priv) == 3) i915_irq_postinstall(dev_priv); else i8xx_irq_postinstall(dev_priv); } else { - if (INTEL_GEN(dev_priv) >= 11) + if (GRAPHICS_VER(dev_priv) >= 11) gen11_irq_postinstall(dev_priv); - else if (INTEL_GEN(dev_priv) >= 8) + else if (GRAPHICS_VER(dev_priv) >= 8) gen8_irq_postinstall(dev_priv); else ilk_irq_postinstall(dev_priv); |