| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-06-30 | riscv: add ASID-based tlbflushing methods | Guo Ren |
| 2021-06-08 | riscv: mm: Use better bitmap_zalloc() | Kefeng Wang |
| 2021-05-29 | riscv: Add __init section marker to some functions again | Jisheng Zhang |
| 2021-05-25 | riscv: Optimize switch_mm by passing "cpu" to flush_icache_deferred() | Jisheng Zhang |
| 2021-02-18 | RISC-V: Implement ASID allocator | Anup Patel |
| 2019-11-17 | riscv: add nommu support | Christoph Hellwig |
| 2019-10-28 | riscv: add missing header file includes | Paul Walmsley |
| 2019-08-30 | riscv: Using CSR numbers to access CSRs | Bin Meng |
| 2019-05-16 | riscv: move switch_mm to its own file | Gary Guo |
 |
index : linux.git | |
| Linux Kernel | Andi Shyti |
| summaryrefslogtreecommitdiff |