| Age | Commit message (Expand) | Author |
|---|
| 2022-09-18 | clk: renesas: r8a779g0: Add EtherAVB clocks | Geert Uytterhoeven |
| 2022-09-18 | clk: renesas: r8a779g0: Add PFC/GPIO clocks | Geert Uytterhoeven |
| 2022-09-18 | clk: renesas: r8a779g0: Add I2C clocks | Geert Uytterhoeven |
| 2022-09-18 | clk: renesas: r8a779g0: Add watchdog clock | Geert Uytterhoeven |
| 2022-08-29 | clk: renesas: r8a779f0: Add MSIOF clocks | Wolfram Sang |
| 2022-08-29 | clk: renesas: r9a09g011: Add IIC clock and reset entries | Phil Edworthy |
| 2022-08-22 | clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info | Biju Das |
| 2022-08-22 | clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks | Wolfram Sang |
| 2022-08-15 | clk: renesas: r8a779f0: Add CMT clocks | Wolfram Sang |
| 2022-08-15 | clk: renesas: r8a779f0: Add SDH0 clock | Wolfram Sang |
| 2022-07-05 | clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config | Andi Kleen |
| 2022-07-05 | clk: renesas: r9a07g043: Add support for RZ/Five SoC | Lad Prabhakar |
| 2022-06-17 | clk: renesas: r8a779f0: Add HSCIF clocks | Wolfram Sang |
| 2022-06-17 | clk: renesas: r8a779f0: Add PCIe clocks | Yoshihiro Shimoda |
| 2022-06-17 | clk: renesas: r8a779f0: Add Z0 and Z1 clock support | Geert Uytterhoeven |
| 2022-06-13 | clk: renesas: rza1: Remove struct rz_cpg | Geert Uytterhoeven |
| 2022-06-13 | clk: renesas: r8a7779: Remove struct r8a7779_cpg | Geert Uytterhoeven |
| 2022-06-13 | clk: renesas: r8a7778: Remove struct r8a7778_cpg | Geert Uytterhoeven |
| 2022-06-13 | clk: renesas: sh73a0: Remove sh73a0_cpg.reg | Geert Uytterhoeven |
| 2022-06-13 | clk: renesas: r8a7740: Remove r8a7740_cpg.reg | Geert Uytterhoeven |
| 2022-06-13 | clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg | Geert Uytterhoeven |
| 2022-06-13 | clk: renesas: r8a779f0: Add SDHI0 clock | Wolfram Sang |
| 2022-06-13 | clk: renesas: r8a779f0: Add thermal clock | Wolfram Sang |
| 2022-06-07 | clk: renesas: rzg2l: Fix reset status function | Biju Das |
| 2022-06-06 | clk: renesas: r9a06g032: Fix UART clkgrp bitsel | Ralph Siemsen |
| 2022-06-06 | clk: renesas: r9a06g032: Drop some unused fields | Ralph Siemsen |
| 2022-06-06 | clk: renesas: r9a09g011: Add WDT clock and reset entries | Phil Edworthy |
| 2022-06-06 | clk: renesas: r9a09g011: Add PFC clock and reset entries | Phil Edworthy |
| 2022-06-06 | clk: renesas: r9a07g044: Add POEG clock and reset entries | Biju Das |
| 2022-06-06 | clk: renesas: r9a07g044: Add GPT clock and reset entry | Biju Das |
| 2022-05-29 | Merge tag 'dmaengine-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g... | Linus Torvalds |
| 2022-05-19 | clk: renesas: r9a06g032: Probe possible children | Miquel Raynal |
| 2022-05-19 | clk: renesas: r9a06g032: Export function to set dmamux | Miquel Raynal |
| 2022-05-06 | clk: renesas: r9a09g011: Add eth clock and reset entries | Phil Edworthy |
| 2022-05-06 | clk: renesas: Add RZ/V2M support using the rzg2l driver | Phil Edworthy |
| 2022-05-05 | clk: renesas: rzg2l: Add support for RZ/V2M reset monitor reg | Phil Edworthy |
| 2022-05-05 | clk: renesas: rzg2l: Make use of CLK_MON registers optional | Phil Edworthy |
| 2022-05-05 | clk: renesas: rzg2l: Set HIWORD mask for all mux and dividers | Phil Edworthy |
| 2022-05-05 | clk: renesas: rzg2l: Add read only versions of the clk macros | Phil Edworthy |
| 2022-05-05 | clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macro | Phil Edworthy |
| 2022-05-05 | clk: renesas: r9a07g044: Fix OSTM1 module clock name | Geert Uytterhoeven |
| 2022-05-05 | clk: renesas: r9a07g043: Add clock and reset entries for ADC | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g043: Add TSU clock and reset entry | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g043: Add RSPI clock and reset entries | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Co... | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g044: Add DSI clock and reset entries | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g044: Add LCDC clock and reset entries | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g044: Add M4 Clock support | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g044: Add M3 Clock support | Biju Das |
| 2022-05-05 | clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support | Biju Das |
