| Age | Commit message (Expand) | Author |
|---|
| 2019-07-17 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds |
| 2019-06-27 | clk: rockchip: export HDMIPHY clock on rk3228 | Heiko Stuebner |
| 2019-06-27 | clk: rockchip: add watchdog pclk on rk3328 | Heiko Stuebner |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner |
| 2019-06-15 | clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro | Heiko Stuebner |
| 2019-06-14 | clk: rockchip: add a type from SGRF-controlled gate clocks | Heiko Stuebner |
| 2019-06-06 | clk: rockchip: Remove 48 MHz PLL rate from rk3288 | Douglas Anderson |
| 2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 | Thomas Gleixner |
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner |
| 2019-05-20 | clk: rockchip: add 1.464GHz cpu-clock rate to rk3228 | Justin Swartz |
| 2019-05-20 | clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase() | Douglas Anderson |
| 2019-05-20 | clk: rockchip: Don't yell about bad mmc phases when getting | Douglas Anderson |
| 2019-05-20 | clk: rockchip: Use clk_hw_get_rate() in MMC phase calculation | Douglas Anderson |
| 2019-05-15 | clk: Remove io.h from clk-provider.h | Stephen Boyd |
| 2019-05-07 | Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a... | Stephen Boyd |
| 2019-04-23 | clk: core: replace clk_{readl,writel} with {readl,writel} | Jonas Gorski |
| 2019-04-23 | clk: rockchip: undo several noc and special clocks as critical on rk3288 | Douglas Anderson |
| 2019-04-12 | clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type | Finley Xiao |
| 2019-04-12 | clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288 | Douglas Anderson |
| 2019-04-12 | clk: rockchip: Limit use of USB PHY clock to USB on rk3288 | Matthias Kaehlcke |
| 2019-04-12 | clk: rockchip: Fix video codec clocks on rk3288 | Douglas Anderson |
| 2019-04-11 | clk: rockchip: Make rkpwm a critical clock on rk3288 | Douglas Anderson |
| 2019-03-18 | clk: rockchip: fix wrong clock definitions for rk3328 | Jonas Karlman |
| 2019-01-07 | clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks | Finley Xiao |
| 2019-01-07 | clk: rockchip: fix frac settings of GPLL clock for rk3328 | Katsuhiro Suzuki |
| 2018-11-26 | clk: rockchip: add clock-id to gate of ACODEC for rk3328 | Katsuhiro Suzuki |
| 2018-11-19 | clk: rockchip: fix I2S1 clock gate register for rk3328 | Katsuhiro Suzuki |
| 2018-11-15 | clk: rockchip: make rk3188 hclk_vio_bus critical | Mark Yao |
| 2018-11-15 | clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering | Heiko Stuebner |
| 2018-11-15 | clk: rockchip: fix rk3188 sclk_smc gate data | Finley Xiao |
| 2018-11-12 | clk: rockchip: fix typo in rk3188 spdif_frac parent | Johan Jonker |
| 2018-10-17 | clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call | Enric Balletbo i Serra |
| 2018-10-11 | clk: rockchip: use the newly added clock-id for hdmi on RK3066 | Heiko Stuebner |
| 2018-10-11 | clk: rockchip: fix wrong mmc sample phase shift for rk3328 | Ziyuan Xu |
| 2018-08-31 | clk: rockchip: improve rk3288 pll rates for better hdmi output | Urja Rannikko |
| 2018-08-06 | clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399 | Levin Du |
| 2018-07-08 | clk: rockchip: fix clk_i2sout parent selection bits on rk3399 | Alberto Panizzo |
| 2018-07-06 | clk: rockchip: add clock controller for px30 | Elaine Zhang |
| 2018-07-06 | clk: rockchip: add support for half divider | Elaine Zhang |
| 2018-05-23 | clk: rockchip: remove deprecated gate-clk code and dt-binding | Heiko Stuebner |
| 2018-05-22 | clk: rockchip: use match_string() helper | Yisheng Xie |
| 2018-03-23 | clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399 | Lin Huang |
| 2018-03-23 | clk: rockchip: Fix error return in phase clock registration | Shawn Lin |
| 2018-03-23 | clk: rockchip: Correct the behaviour of restoring cached phase | Shawn Lin |
| 2018-03-23 | clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 | Shawn Lin |
| 2018-03-23 | clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 | Shawn Lin |
| 2018-03-14 | clk: rockchip: Add 1.6GHz PLL rate for rk3399 | Derek Basehore |
| 2018-03-13 | clk: rockchip: Restore the clock phase after the rate was changed | Shawn Lin |
| 2018-03-05 | clk: rockchip: Prevent calculating mmc phase if clock rate is zero | Shawn Lin |
| 2018-03-02 | clk: rockchip: Free the memory on the error path | Shawn Lin |
