OMAP4 PM: Add support for OMAP4 MPU DVFS

This patchset adds support for OMAP4 MPU DVFS with following changes
- add vdd information for omap4
- enable all relevant OPPs for MPU VDD
- define and register get_rate and set_rate with DVFS layer

Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>

4 files changed, 47 insertions, 2 deletions

diff --git a/arch/arm/mach-omap2/dvfs.c b/arch/arm/mach-omap2/dvfs.c
index 1e5492c2ecb..fb9215cb927 100644
--- a/arch/arm/mach-omap2/dvfs.c
+++ b/arch/arm/mach-omap2/dvfs.c
@@ -100,6 +100,19 @@ static struct voltagedomain omap3_vdd[] = {
 	.name = "core",
 	},
 };
+
+static struct voltagedomain omap4_vdd[] = {
+	{
+	.name = "mpu",
+	},
+	{
+	.name = "iva",
+	},
+	{
+	.name = "core",
+	},
+};
+
 static int omap_dvfs_voltage_scale(struct omap_vdd_dvfs_info *dvfs_info);
 
 static int __init omap_dvfs_init(void);
@@ -723,6 +736,12 @@ static int __init omap_dvfs_init()
 	if (cpu_is_omap34xx()) {
 		omap_nr_vdd = 2;
 		vdd_list = omap3_vdd;
+	} else if (cpu_is_omap44xx()) {
+		omap_nr_vdd = 3;
+		vdd_list = omap4_vdd;
+	} else {
+		pr_warning("DVFS not supported\n");
+		return -EINVAL;
 	}
 
 	omap_dvfs_info_list = kzalloc(omap_nr_vdd *
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0bd579e98e7..93d441798d1 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2058,6 +2058,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
 	.mpu_irqs	= omap44xx_mpu_irqs,
 	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mpu_irqs),
 	.main_clk	= "dpll_mpu_m2_ck",
+	.vdd_name       = "mpu",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL,
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 80d08bcd612..2e8bb8a6ba9 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -30,9 +30,9 @@ static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
 	/* MPU OPP2 - OPP100 */
 	OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
 	/* MPU OPP3 - OPP-Turbo */
-	OPP_INITIALIZER("mpu", false, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
+	OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
 	/* MPU OPP4 - OPP-SB */
-	OPP_INITIALIZER("mpu", false, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
+	OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
 	/* L3 OPP1 - OPP50 */
 	OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
 	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 1b94ad47b07..51b0dcdef60 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -130,6 +130,24 @@ static unsigned long omap3_l3_get_rate(struct device *dev)
 	return dpll3_clk->rate / l3_div;
 }
 
+static int omap4_mpu_set_rate(struct device *dev, unsigned long rate)
+{
+	int ret;
+
+	ret = clk_set_rate(dpll1_clk, rate);
+	if (ret) {
+		dev_warn(dev, "%s: Unable to set rate to %ld\n",
+			__func__, rate);
+		return ret;
+	}
+
+	return 0;
+}
+
+static unsigned long omap4_mpu_get_rate(struct device *dev)
+{
+	return dpll1_clk->rate;
+}
 
 /*
  * Build omap_devices for processors and bus.
@@ -160,7 +178,14 @@ static void omap2_init_processor_devices(void)
 			omap_device_register_dvfs_callbacks(l3_dev,
 				omap3_l3_set_rate, omap3_l3_get_rate);
 
+	} else if (cpu_is_omap44xx()) {
+		dpll1_clk = clk_get(NULL, "dpll_mpu_ck");
+
+		if (mpu_dev)
+			omap_device_register_dvfs_callbacks(mpu_dev,
+				omap4_mpu_set_rate, omap4_mpu_get_rate);
 	}
+
 }
 
 /* Types of sleep_switch used in omap_set_pwrdm_state */