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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2011-03-13 20:06:59 +0000
committerKevin Hilman <khilman@ti.com>2011-03-15 08:17:23 -0700
commit60d97a840175d3becb2e6de36537a5cdfc0ec3a9 (patch)
tree6cbdb324a563050736f15388418300a54dd0bba5
parentf6e5306ecf269cac52cb06a2f356431f63640595 (diff)
davinci: DM644x EVM: register MUSB device earlier
The MUSB driver doesn't see its platform device on DM644x EVM board anymore since commit 73b089b052a69020b953312a624a6e1eb5b81fab (usb: musb: split davinci to its own platform_driver) because the new probe is called as subsys_initcall() now, and the device is registered later than that by the board code. Move the registration to davinci_evm_init() -- it's safe to do so because the MUSB core device still gets initialized as fs_initcall() -- which is late enough for the I2C GPIO expander (which controls VBUS) to be initialized. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 0ca90b83458..556bbd468db 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -440,11 +440,6 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
gpio_request(gpio + 7, "nCF_SEL");
gpio_direction_output(gpio + 7, 1);
- /* irlml6401 switches over 1A, in under 8 msec;
- * now it can be managed by nDRV_VBUS ...
- */
- davinci_setup_usb(1000, 8);
-
return 0;
}
@@ -705,6 +700,9 @@ static __init void davinci_evm_init(void)
davinci_serial_init(&uart_config);
dm644x_init_asp(&dm644x_evm_snd_data);
+ /* irlml6401 switches over 1A, in under 8 msec */
+ davinci_setup_usb(1000, 8);
+
soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
/* Register the fixup for PHY on DaVinci */
phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,