mach_ux500: timers, renaming ux500 common part

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>

8 files changed, 66 insertions, 62 deletions

diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 5368e528d01..a4c18910f7f 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -25,7 +25,7 @@ CONFIG_MACH_U8500=y
 CONFIG_MACH_SNOWBALL=y
 CONFIG_MACH_HREFV60=y
 CONFIG_MACH_U5500=y
-CONFIG_U8500_PRCMU_TIMER=y
+CONFIG_UX500_PRCMU_TIMER=y
 CONFIG_DB8500_MLOADER=y
 CONFIG_UX500_SUSPEND=y
 CONFIG_UX500_SUSPEND_STANDBY=y
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 82fb5d44bf9..0e97207e825 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -71,9 +71,9 @@ choice
 	prompt "Ux500 sched_clock timer"
 	default UX500_MTU_TIMER
 
-config U8500_PRCMU_TIMER
+config UX500_PRCMU_TIMER
 	bool "PRCMU Timer sched_clock"
-	depends on UX500_SOC_DB8500 && U8500_CPUIDLE
+	depends on U8500_CPUIDLE
 	help
 	  Add support for an always on sched_clock, required for
 	  proper cpuidle and suspend.
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index 29fad2c935f..92a28da2936 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -7,16 +7,14 @@ ifeq ($(CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL), y)
 endif
 
 obj-y				:= clock.o cpu.o devices.o dcache.o \
-				   devices-common.o \
-				   id.o pins.o timer-mtu.o timer-rtt.o usb.o
+				   devices-common.o id.o pins.o \
+				   timer.o timer-mtu.o timer-rtt.o usb.o
 obj-y				+= pm/
 obj-$(CONFIG_UX500_SOC_DB5500)	+= cpu-db5500.o dma-db5500.o prcmu-db5500.o \
 				   devices-db5500.o
 obj-$(CONFIG_UX500_SOC_DB8500)	+= cpu-db8500.o devices-db8500.o \
 				   prcmu-db8500.o clock-db8500.o \
-			           timer-db8500.o timer-db8500-prcmu.o \
-				   regulator-db8500.o
-
+			           regulator-db8500.o
 obj-$(CONFIG_MACH_U8500)	+= board-mop500.o board-mop500-sdi.o \
 				board-mop500-regulators.o \
 				board-mop500-uib.o board-mop500-stuib.o \
@@ -30,7 +28,8 @@ obj-$(CONFIG_HOTPLUG_CPU)	+= hotplug.o
 obj-$(CONFIG_LOCAL_TIMERS)	+= localtimer.o
 obj-$(CONFIG_U5500_MODEM_IRQ)	+= modem-irq-db5500.o
 obj-$(CONFIG_U5500_MBOX)	+= mbox-db5500.o
-obj-$(CONFIG_TEE_UX500)	+= tee_ux500.o
+obj-$(CONFIG_TEE_UX500) 	+= tee_ux500.o
 obj-$(CONFIG_TEE_SVP)		+= tee_service_svp.o
 obj-$(CONFIG_TEE_SVP)		+= tee_ta_start_modem_svp.o
 obj-$(CONFIG_DB8500_MLOADER) 	+= mloader-db8500.o
+obj-$(CONFIG_UX500_PRCMU_TIMER)	+= timer-prcmu.o
diff --git a/arch/arm/mach-ux500/pm/cpuidle.c b/arch/arm/mach-ux500/pm/cpuidle.c
index 6968c9b1323..930543267d2 100644
--- a/arch/arm/mach-ux500/pm/cpuidle.c
+++ b/arch/arm/mach-ux500/pm/cpuidle.c
@@ -577,7 +577,7 @@ static int enter_sleep(struct cpuidle_device *dev,
 
 	/* Compensate for ULPLL start up time */
 	if (cstates[target].UL_PLL == UL_PLL_OFF)
-		(void) u8500_rtc_adjust_next_wakeup(-UL_PLL_START_UP_LATENCY);
+		(void) rtc_rtt_adjust_next_wakeup(-UL_PLL_START_UP_LATENCY);
 
 	if (cstates[target].APE == APE_OFF) {
 
diff --git a/arch/arm/mach-ux500/timer-db8500-prcmu.c b/arch/arm/mach-ux500/timer-prcmu.c
index 606efa3c0f8..64dc5730506 100644
--- a/arch/arm/mach-ux500/timer-db8500-prcmu.c
+++ b/arch/arm/mach-ux500/timer-prcmu.c
@@ -7,7 +7,7 @@
  * sched_clock implementation is based on:
  * plat-nomadik/timer.c Linus Walleij <linus.walleij@stericsson.com>
  *
- * DB8500-PRCMU Timer
+ * UX500 PRCMU Timer
  * The PRCMU has 5 timers which are available in a always-on
  * power domain. we use the Timer 4 for our always-on clock source.
  */
@@ -35,21 +35,21 @@ static __iomem void *prcmu_base;
 
 #define SCHED_CLOCK_MIN_WRAP (131072) /* 2^32 / 32768 */
 
-static cycle_t db8500_prcmu_read_timer_nop(struct clocksource *cs)
+static cycle_t prcmu_read_timer_nop(struct clocksource *cs)
 {
 	return 0;
 }
 
-static struct clocksource db8500_prcmu_clksrc = {
-	.name		= "db8500-prcmu-timer4",
+static struct clocksource prcmu_clksrc = {
+	.name		= "prcmu-timer4",
 	.rating		= 300,
-	.read		= db8500_prcmu_read_timer_nop,
+	.read		= prcmu_read_timer_nop,
 	.shift		= 10,
 	.mask		= CLOCKSOURCE_MASK(32),
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static cycle_t db8500_prcmu_read_timer(struct clocksource *cs)
+static cycle_t prcmu_read_timer(struct clocksource *cs)
 {
 	u32 count, count2;
 
@@ -65,13 +65,13 @@ static cycle_t db8500_prcmu_read_timer(struct clocksource *cs)
 	return ~count;
 }
 
-#ifdef CONFIG_U8500_PRCMU_TIMER
+#ifdef CONFIG_UX500_PRCMU_TIMER
 unsigned long long notrace sched_clock(void)
 {
-	return clocksource_cyc2ns(db8500_prcmu_clksrc.read(
-			&db8500_prcmu_clksrc),
-			db8500_prcmu_clksrc.mult,
-			db8500_prcmu_clksrc.shift);
+	return clocksource_cyc2ns(prcmu_clksrc.read(
+			&prcmu_clksrc),
+			prcmu_clksrc.mult,
+			prcmu_clksrc.shift);
 }
 #endif
 
@@ -79,10 +79,10 @@ unsigned long long notrace sched_clock(void)
 
 static unsigned long __init boottime_get_time(void)
 {
-	return div_s64(clocksource_cyc2ns(db8500_prcmu_clksrc.read(
-			&db8500_prcmu_clksrc),
-			db8500_prcmu_clksrc.mult,
-			db8500_prcmu_clksrc.shift), 1000);
+	return div_s64(clocksource_cyc2ns(prcmu_clksrc.read(
+			&prcmu_clksrc),
+			prcmu_clksrc.mult,
+			prcmu_clksrc.shift), 1000);
 }
 
 static struct boottime_timer __initdata boottime_timer = {
@@ -92,14 +92,14 @@ static struct boottime_timer __initdata boottime_timer = {
 };
 #endif
 
-void __init db8500_prcmu_timer_init(void)
+void __init prcmu_timer_init(void)
 {
 	if (ux500_is_svp())
 		return;
 
 	prcmu_base = __io_address(U8500_PRCMU_BASE);
 
-	clocksource_calc_mult_shift(&db8500_prcmu_clksrc,
+	clocksource_calc_mult_shift(&prcmu_clksrc,
 		RATE_32K, SCHED_CLOCK_MIN_WRAP);
 
 	/*
@@ -112,9 +112,9 @@ void __init db8500_prcmu_timer_init(void)
 		writel(TIMER_MODE_CONTINOUS, PRCMU_TIMER_4_MODE);
 		writel(TIMER_DOWNCOUNT_VAL, PRCMU_TIMER_4_REF);
 	}
-	db8500_prcmu_clksrc.read = db8500_prcmu_read_timer;
+	prcmu_clksrc.read = prcmu_read_timer;
 
-	clocksource_register(&db8500_prcmu_clksrc);
+	clocksource_register(&prcmu_clksrc);
 
 	if (!ux500_is_svp())
 		boottime_activate(&boottime_timer);
diff --git a/arch/arm/mach-ux500/timer-rtt.c b/arch/arm/mach-ux500/timer-rtt.c
index 1e058556d7a..8e5a0f72dc6 100644
--- a/arch/arm/mach-ux500/timer-rtt.c
+++ b/arch/arm/mach-ux500/timer-rtt.c
@@ -57,8 +57,8 @@ static unsigned long rtc_readl(unsigned long addr)
 	return readl(rtc_base + addr);
 }
 
-static void u8500_rtc_set_mode(enum clock_event_mode mode,
-			       struct clock_event_device *evt)
+static void rtc_set_mode(enum clock_event_mode mode,
+			 struct clock_event_device *evt)
 {
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
@@ -81,8 +81,8 @@ static void u8500_rtc_set_mode(enum clock_event_mode mode,
 	}
 }
 
-static int u8500_rtc_set_event(unsigned long delta,
-			       struct clock_event_device *dev)
+static int rtc_set_event(unsigned long delta,
+			 struct clock_event_device *dev)
 {
 
 	rtc_writel(RTC_TCR_RTTOS, RTC_TCR);
@@ -105,7 +105,7 @@ static int u8500_rtc_set_event(unsigned long delta,
 	return 0;
 }
 
-static irqreturn_t u8500_rtc_interrupt(int irq, void *dev)
+static irqreturn_t rtc_interrupt(int irq, void *dev)
 {
 	struct clock_event_device *clkevt = dev;
 
@@ -126,27 +126,27 @@ static irqreturn_t u8500_rtc_interrupt(int irq, void *dev)
 void smp_timer_broadcast(const struct cpumask *mask);
 #endif
 
-static struct clock_event_device u8500_rtc = {
+static struct clock_event_device rtc_dev = {
 	.name		= "rtc-rtt",
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.shift		= 32,
 	.rating		= 300,
-	.set_next_event	= u8500_rtc_set_event,
-	.set_mode	= u8500_rtc_set_mode,
+	.set_next_event	= rtc_set_event,
+	.set_mode	= rtc_set_mode,
 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 	.broadcast      = smp_timer_broadcast,
 #endif
 	.cpumask	= cpu_all_mask,
 };
 
-static struct irqaction u8500_rtc_irq = {
+static struct irqaction rtc_irq = {
 	.name		= "RTC-RTT Timer Tick",
 	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_SHARED,
-	.handler	= u8500_rtc_interrupt,
-	.dev_id		= &u8500_rtc,
+	.handler	= rtc_interrupt,
+	.dev_id		= &rtc_dev,
 };
 
-void u8500_rtc_init(unsigned int cpu)
+void rtc_rtt_timer_init(unsigned int cpu)
 {
 	int irq;
 
@@ -163,21 +163,21 @@ void u8500_rtc_init(unsigned int cpu)
 		return;
 	}
 
-	u8500_rtc.irq = irq;
+	rtc_dev.irq = irq;
 
 	rtc_writel(0, RTC_TCR);
 	rtc_writel(RTC_ICR_TIC, RTC_ICR);
 	rtc_writel(RTC_IMSC_TIMSC, RTC_IMSC);
 
-	u8500_rtc.mult = div_sc(RATE_32K, NSEC_PER_SEC, u8500_rtc.shift);
-	u8500_rtc.max_delta_ns = clockevent_delta2ns(0xffffffff, &u8500_rtc);
-	u8500_rtc.min_delta_ns = clockevent_delta2ns(0xff, &u8500_rtc);
+	rtc_dev.mult = div_sc(RATE_32K, NSEC_PER_SEC, rtc_dev.shift);
+	rtc_dev.max_delta_ns = clockevent_delta2ns(0xffffffff, &rtc_dev);
+	rtc_dev.min_delta_ns = clockevent_delta2ns(0xff, &rtc_dev);
 
-	setup_irq(irq, &u8500_rtc_irq);
-	clockevents_register_device(&u8500_rtc);
+	setup_irq(irq, &rtc_irq);
+	clockevents_register_device(&rtc_dev);
 }
 
-int u8500_rtc_adjust_next_wakeup(int delta_in_us)
+int rtc_rtt_adjust_next_wakeup(int delta_in_us)
 {
 	int delta_ticks;
 	u64 temp;
@@ -210,5 +210,5 @@ int u8500_rtc_adjust_next_wakeup(int delta_in_us)
 	if (((u64)val + (u64)delta_ticks) > UINT_MAX)
 		return -EINVAL;
 
-	return u8500_rtc_set_event(val + delta_ticks, &u8500_rtc);
+	return rtc_set_event(val + delta_ticks, &rtc_dev);
 }
diff --git a/arch/arm/mach-ux500/timer-rtt.h b/arch/arm/mach-ux500/timer-rtt.h
index 6cde4b2f035..68fc20da2d6 100644
--- a/arch/arm/mach-ux500/timer-rtt.h
+++ b/arch/arm/mach-ux500/timer-rtt.h
@@ -9,7 +9,12 @@
 #define TIMER_RTT_H
 
 /**
- * u8500_rtc_adjust_next_wakeup()
+ * rtc_rtt_timer_init()
+ */
+void rtc_rtt_timer_init(unsigned int cpu);
+
+/**
+ * rtc_rtt_adjust_next_wakeup()
  *
  * @delta_in_us: delta time to wake up. Can be negative, to wake up closer
  * in time.
@@ -20,6 +25,6 @@
  * ARM can start executing.
  * Returns -EINVAL if the wake up time can't be adjusted.
  */
-int u8500_rtc_adjust_next_wakeup(int delta_in_us);
+int rtc_rtt_adjust_next_wakeup(int delta_in_us);
 
 #endif
diff --git a/arch/arm/mach-ux500/timer-db8500.c b/arch/arm/mach-ux500/timer.c
index c552b62e4e3..2d3673da5ab 100644
--- a/arch/arm/mach-ux500/timer-db8500.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -8,15 +8,15 @@
 #include <mach/setup.h>
 #include <mach/hardware.h>
 
+#include "timer-rtt.h"
 #include "pm/context.h"
 
-void u8500_rtc_init(unsigned int cpu);
-void db8500_prcmu_timer_init(void);
+void prcmu_timer_init(void);
 void mtu_timer_init(void);
 void mtu_timer_reset(void);
 
 #ifdef CONFIG_LOCAL_TIMERS
-extern void *twd_base;
+#include <asm/smp_twd.h>
 #endif
 
 #ifdef CONFIG_UX500_CONTEXT
@@ -33,16 +33,16 @@ static struct notifier_block mtu_context_notifier = {
 };
 #endif
 
-static void u8500_timer_reset(void)
+static void ux500_timer_reset(void)
 {
 	mtu_timer_reset();
 }
 
-static void u8500_timer_suspend(void)
+static void ux500_timer_suspend(void)
 {
 }
 
-static void __init u8500_timer_init(void)
+static void __init ux500_timer_init(void)
 {
 
 #ifdef CONFIG_LOCAL_TIMERS
@@ -69,8 +69,8 @@ static void __init u8500_timer_init(void)
  *
  */
 	mtu_timer_init();
-	u8500_rtc_init(0);
-	db8500_prcmu_timer_init();
+	rtc_rtt_timer_init(0);
+	prcmu_timer_init();
 
 #ifdef CONFIG_UX500_CONTEXT
 	WARN_ON(context_ape_notifier_register(&mtu_context_notifier));
@@ -78,7 +78,7 @@ static void __init u8500_timer_init(void)
 }
 
 struct sys_timer ux500_timer = {
-	.init		= u8500_timer_init,
-	.suspend	= u8500_timer_suspend,
-	.resume		= u8500_timer_reset,
+	.init		= ux500_timer_init,
+	.suspend	= ux500_timer_suspend,
+	.resume		= ux500_timer_reset,
 };