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authorColin Cross <ccross@android.com>2011-09-14 15:59:50 -0700
committerColin Cross <ccross@android.com>2012-04-09 13:53:11 -0700
commit74b6cdd9573abba116584c08003ee5e87e96ea14 (patch)
tree6e3e4a4a5556ef9290c508e2132fb733dbf13dee /arch/arm/include
parentbd7f9036ce5be5ed08f96bfc45646ddef461b69e (diff)
ARM: cache-l2x0: update workaround for PL310 errata 727915
ARM errata 727915 for PL310 has been updated to include a new workaround required for PL310 r2p0 for l2x0_flush_all, which also affects l2x0_clean_all in my testing. For r2p0, clean or flush each set/way individually. For r3p0 or greater, use the debug register for cleaning and flushing. Requires exporting the cache_id, sets and ways detected in the init function for later use. Change-Id: I215055cbe5dc7e4e8184fb2befc4aff672ef0a12 Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index c4c87bc1223..bd2c6a530a5 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -66,6 +66,7 @@
#define L2X0_STNDBY_MODE_EN (1 << 0)
/* Registers shifts and masks */
+#define L2X0_CACHE_ID_REV_MASK (0x3f)
#define L2X0_CACHE_ID_PART_MASK (0xf << 6)
#define L2X0_CACHE_ID_PART_L210 (1 << 6)
#define L2X0_CACHE_ID_PART_L310 (3 << 6)
@@ -102,6 +103,8 @@
#define L2X0_ADDR_FILTER_EN 1
+#define REV_PL310_R2P0 4
+
#ifndef __ASSEMBLY__
extern void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask);
#if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF)