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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-23 15:15:27 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-23 15:15:27 -0700
commit42cd71bf1e3a081b3150018bbf448cb6c8a844a5 (patch)
tree4a5d2eb0444255e4ad827a76dbd1417dd3876db6 /arch/arm/mach-stmp37xx/include/mach/regs-clkctrl.h
parentf5039935ac685b3b9b8c13fbc33cac8643dee32e (diff)
parent9a55d9752d8abfc62f1ab05ccc790d22a0c8e7c0 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits) ARM: bcmring: convert to use sp804 clockevents ARM: bcmring: convert to sp804 clocksource ARM: 6912/1: bcmring: Add clkdev table in init_early clockevents: ARM sp804: obtain sp804 timer rate via clks clockevents: ARM sp804: allow clockevent name to be specified clocksource: ARM sp804: obtain sp804 timer rate via clks clocksource: ARM sp804: allow clocksource name to be specified clocksource: convert OMAP1 to 32-bit down counting clocksource clocksource: convert MXS timrotv2 to 32-bit down counting clocksource clocksource: convert SPEAr platforms 16-bit up counting clocksource clocksource: convert Integrator/AP 16-bit down counting clocksource clocksource: convert W90x900 24-bit down counting clocksource clocksource: convert ARM 32-bit down counting clocksources clocksource: convert ARM 32-bit up counting clocksources clocksource: add common mmio clocksource ARM: update sa1100 to reflect PXA updates ARM: omap1: convert to using readl/writel instead of volatile struct ARM: omap1: delete useless interrupt handler ARM: s5p: consolidate selection of timer register ARM: 6939/1: fix missing 'cpu_relax()' declaration ...
Diffstat (limited to 'arch/arm/mach-stmp37xx/include/mach/regs-clkctrl.h')
-rw-r--r--arch/arm/mach-stmp37xx/include/mach/regs-clkctrl.h72
1 files changed, 0 insertions, 72 deletions
diff --git a/arch/arm/mach-stmp37xx/include/mach/regs-clkctrl.h b/arch/arm/mach-stmp37xx/include/mach/regs-clkctrl.h
deleted file mode 100644
index 47f5c92fdaf..00000000000
--- a/arch/arm/mach-stmp37xx/include/mach/regs-clkctrl.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * stmp37xx: CLKCTRL register definitions
- *
- * Copyright (c) 2008 Freescale Semiconductor
- * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _MACH_REGS_CLKCTRL
-#define _MACH_REGS_CLKCTRL
-
-#define REGS_CLKCTRL_BASE (STMP3XXX_REGS_BASE + 0x40000)
-
-#define HW_CLKCTRL_PLLCTRL0 0x0
-#define BM_CLKCTRL_PLLCTRL0_EN_USB_CLKS 0x00040000
-
-#define HW_CLKCTRL_CPU 0x20
-#define BM_CLKCTRL_CPU_DIV_CPU 0x0000003F
-#define BP_CLKCTRL_CPU_DIV_CPU 0
-
-#define HW_CLKCTRL_HBUS 0x30
-#define BM_CLKCTRL_HBUS_DIV 0x0000001F
-#define BP_CLKCTRL_HBUS_DIV 0
-
-#define HW_CLKCTRL_XBUS 0x40
-
-#define HW_CLKCTRL_XTAL 0x50
-
-#define HW_CLKCTRL_PIX 0x60
-#define BM_CLKCTRL_PIX_DIV 0x00007FFF
-#define BP_CLKCTRL_PIX_DIV 0
-#define BM_CLKCTRL_PIX_CLKGATE 0x80000000
-
-#define HW_CLKCTRL_SSP 0x70
-
-#define HW_CLKCTRL_GPMI 0x80
-
-#define HW_CLKCTRL_SPDIF 0x90
-
-#define HW_CLKCTRL_EMI 0xA0
-
-#define HW_CLKCTRL_IR 0xB0
-
-#define HW_CLKCTRL_SAIF 0xC0
-
-#define HW_CLKCTRL_FRAC 0xD0
-#define BM_CLKCTRL_FRAC_EMIFRAC 0x00003F00
-#define BP_CLKCTRL_FRAC_EMIFRAC 8
-#define BM_CLKCTRL_FRAC_PIXFRAC 0x003F0000
-#define BP_CLKCTRL_FRAC_PIXFRAC 16
-#define BM_CLKCTRL_FRAC_CLKGATEPIX 0x00800000
-
-#define HW_CLKCTRL_CLKSEQ 0xE0
-#define BM_CLKCTRL_CLKSEQ_BYPASS_PIX 0x00000002
-
-#define HW_CLKCTRL_RESET 0xF0
-#define BM_CLKCTRL_RESET_DIG 0x00000001
-#define BP_CLKCTRL_RESET_DIG 0
-
-#endif