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authorScott Wood <scottwood@freescale.com>2011-06-14 18:34:35 -0500
committerAvi Kivity <avi@redhat.com>2011-07-12 13:16:34 +0300
commit0ef309956cecbaf6d96c31371bf393c296886fa6 (patch)
tree6ac269ebbf1a23490854d038314bb9abc1dc1720 /arch/m68k/include/asm/byteorder.h
parent6fc4d1eb911cced6bc103f2b36497397e99e8c43 (diff)
KVM: PPC: e500: don't use MAS0 as intermediate storage.
This avoids races. It also means that we use the shadow TLB way, rather than the hardware hint -- if this is a problem, we could do a tlbsx before inserting a TLB0 entry. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/m68k/include/asm/byteorder.h')
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