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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-11-03 08:09:57 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-11-03 08:09:57 -0800 |
| commit | 9ddfd92909ac969758684e309e62198f549786a3 (patch) | |
| tree | e5799c0bb894a98f8c8948ebb568f336233fc0db /arch/mips/mm/init.c | |
| parent | 38dc63459f185795b24a39f3f4921a433ea9980b (diff) | |
| parent | 049a31afe16e733a54f7da7fdf845034758c6ee1 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits)
MIPS: O32: Fix ppoll
MIPS: Oprofile: Rename cpu_type from godson2 to loongson2
MIPS: Alchemy: Fix hang with high-frequency edge interrupts
MIPS: TXx9: Fix spi-baseclk value
MIPS: bcm63xx: Set the correct BCM3302 CPU name
MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store
MIPS: Avoid potential hazard on Context register
MIPS: Octeon: Use lockless interrupt controller operations when possible.
MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity
MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache
MIPS: SMTC: Avoid queing multiple reschedule IPIs
MIPS: GCMP: Avoid accessing registers when they are not present
MIPS: GIC: Random fixes and enhancements.
MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start
MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands
MIPS: SPRAM: Clean up support code a little
MIPS: 1004K: Enable SPRAM support.
MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4
MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT.
MIPS: MTI: Fix accesses to device registers on MIPS boards
...
Diffstat (limited to 'arch/mips/mm/init.c')
| -rw-r--r-- | arch/mips/mm/init.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 15aa1902a78..8d1f4f36304 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -27,6 +27,7 @@ #include <linux/swap.h> #include <linux/proc_fs.h> #include <linux/pfn.h> +#include <linux/hardirq.h> #include <asm/asm-offsets.h> #include <asm/bootinfo.h> @@ -132,7 +133,10 @@ void *kmap_coherent(struct page *page, unsigned long addr) inc_preempt_count(); idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); #ifdef CONFIG_MIPS_MT_SMTC - idx += FIX_N_COLOURS * smp_processor_id(); + idx += FIX_N_COLOURS * smp_processor_id() + + (in_interrupt() ? (FIX_N_COLOURS * NR_CPUS) : 0); +#else + idx += in_interrupt() ? FIX_N_COLOURS : 0; #endif vaddr = __fix_to_virt(FIX_CMAP_END - idx); pte = mk_pte(page, PAGE_KERNEL); |