diff options
| author | Len Brown <len.brown@intel.com> | 2011-03-23 02:34:54 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2011-03-23 02:34:54 -0400 |
| commit | 02e2407858fd62053bf60349c0e72cd1c7a4a60e (patch) | |
| tree | 0ebdbddc97d3abbc675916010e7771065b70c137 /arch/x86/kernel/cpu/perfctr-watchdog.c | |
| parent | 96e1c408ea8a556c5b51e0e7d56bd2afbfbf5fe9 (diff) | |
| parent | 6447f55da90b77faec1697d499ed7986bb4f6de6 (diff) | |
Merge branch 'linus' into release
Conflicts:
arch/x86/kernel/acpi/sleep.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/x86/kernel/cpu/perfctr-watchdog.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perfctr-watchdog.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c index d5a23661550..966512b2cac 100644 --- a/arch/x86/kernel/cpu/perfctr-watchdog.c +++ b/arch/x86/kernel/cpu/perfctr-watchdog.c @@ -46,6 +46,8 @@ static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) /* returns the bit offset of the performance counter register */ switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: + if (msr >= MSR_F15H_PERF_CTR) + return (msr - MSR_F15H_PERF_CTR) >> 1; return msr - MSR_K7_PERFCTR0; case X86_VENDOR_INTEL: if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) @@ -70,6 +72,8 @@ static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr) /* returns the bit offset of the event selection register */ switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: + if (msr >= MSR_F15H_PERF_CTL) + return (msr - MSR_F15H_PERF_CTL) >> 1; return msr - MSR_K7_EVNTSEL0; case X86_VENDOR_INTEL: if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) |