diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-02-01 10:15:32 +1100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-02-01 10:15:32 +1100 |
| commit | fcc3ff4f9d695a80dc6e6058e0d631a3026ed4c3 (patch) | |
| tree | 050a81468f8644cfb0f3c07a140456c136301a30 /arch/x86/kernel/cpu | |
| parent | e95035c61a4c3dae1aa543a5bf5b39846daca061 (diff) | |
| parent | 62152d0ea7012382cd814c7b361b4ef2029f26e6 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86
* git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86:
asm-generic/tlb.h: build fix
x86: uninline __pte_free_tlb() and __pmd_free_tlb()
x86: fix small sparse warning
x86: fix sparse warning in kernel/scx200_32.c
x86: early_ioremap_reset fix 2
x86: c_p_a clflush_cache_range fix
x86: change_page_attr_clear fix
x86: fix sparse warnings in intel_cacheinfo.c
Diffstat (limited to 'arch/x86/kernel/cpu')
| -rw-r--r-- | arch/x86/kernel/cpu/common.c | 5 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/intel_cacheinfo.c | 6 |
2 files changed, 7 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index db28aa9e2f6..d608c9ebbfe 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -274,8 +274,10 @@ void __init cpu_detect(struct cpuinfo_x86 *c) if (c->x86 >= 0x6) c->x86_model += ((tfms >> 16) & 0xF) << 4; c->x86_mask = tfms & 15; - if (cap0 & (1<<19)) + if (cap0 & (1<<19)) { c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8; + c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; + } } } static void __cpuinit early_get_cap(struct cpuinfo_x86 *c) @@ -317,6 +319,7 @@ static void __init early_cpu_detect(void) struct cpuinfo_x86 *c = &boot_cpu_data; c->x86_cache_alignment = 32; + c->x86_clflush_size = 32; if (!have_cpuid_p()) return; diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 8b4507b8469..1b889860eb7 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c @@ -352,8 +352,8 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c) */ if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) { /* supports eax=2 call */ - int i, j, n; - int regs[4]; + int j, n; + unsigned int regs[4]; unsigned char *dp = (unsigned char *)regs; int only_trace = 0; @@ -368,7 +368,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c) /* If bit 31 is set, this is an unknown format */ for ( j = 0 ; j < 3 ; j++ ) { - if ( regs[j] < 0 ) regs[j] = 0; + if (regs[j] & (1 << 31)) regs[j] = 0; } /* Byte 0 is level count, not a descriptor */ |