diff options
| author | Hari Kanigeri <h-kanigeri2@ti.com> | 2011-05-31 09:24:32 +0100 |
|---|---|---|
| committer | Andy Green <andy.green@linaro.org> | 2011-05-31 11:06:02 +0100 |
| commit | b9e725ebbd47704e418981aa4abe21606b854daf (patch) | |
| tree | b7471bbf0d6d9aad0520efef6988c685a955fa26 /arch | |
| parent | 1866657cfb824c629e4917db8b4796dd7238fe07 (diff) | |
omap: iommu- twl and tlb fixes
omap: iommu-update irq mask to be specific about twl and tlb
Revise the IRQ mask definitions to handle the MMU faults related
to TWL fault as well as TLB miss fault.
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Signed-off-by: Hiroshi Doyu <Hiroshi.DOYU@nokia.com>
omap: iommu-add functionality to get TLB miss interrupt
In order to enable TLB miss interrupt, the TWL should be
disabled. This patch provides the functionality to get the
MMU fault interrupt for a TLB miss in the cases where the
users are working with the locked TLB entries and with TWL
disabled.
New interface is added to select twl and to enable TLB miss
interrupt.
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Signed-off-by: Ramesh Gupta <grgupta@ti.com>
Signed-off-by: Hiroshi Doyu <Hiroshi.DOYU@nokia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-omap2/iommu2.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c index adb083e41ac..362b24898fc 100644 --- a/arch/arm/mach-omap2/iommu2.c +++ b/arch/arm/mach-omap2/iommu2.c @@ -84,7 +84,6 @@ static void __iommu_set_twl(struct iommu *obj, bool on) iommu_write_reg(obj, l, MMU_CNTL); } - static int omap2_iommu_enable(struct iommu *obj) { u32 l, pa; |