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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-05 16:45:02 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-05 23:18:31 +0000 |
| commit | 3c8cdf9b60b98c5b408e2cfbcab3160e25e5af5a (patch) | |
| tree | fd67f13bcf05f42f2162db7b4b54bdf817e9eebc /drivers/gpu/drm/i915/i915_drv.h | |
| parent | 88f23b8fa3e6357c423af24ec31c661fc12f884b (diff) | |
drm/i915: Power Context register is only available for gen4 mobiles
The ability to save the hardware context upon powering down the render
clock through PWRCTXA is only available on a couple of gen4 chipsets.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
0 files changed, 0 insertions, 0 deletions