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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-12 08:40:25 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-12 08:40:25 -0800
commitf878133bf022717b880d0e0995b8f91436fd605c (patch)
treeb16528611d3af337f65f8ff0ae9b90b447e345ad /drivers/gpu/drm/i915/i915_suspend.c
parent1b3862798cf4390b9110e54e405646e156f47c83 (diff)
parentd15eda5c6edff4987af6f4423af0bab0c3251e74 (diff)
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (39 commits) i915/gtt: fix ordering causing DMAR errors on object teardown. i915/gtt: fix ordering issues with status setup and DMAR drm/i915/execbuffer: Reorder binding of objects to favour restrictions drm/i915: If we hit OOM when allocating GTT pages, clear the aperture drm/i915/evict: Ensure we completely cleanup on failure drm/i915/execbuffer: Correctly clear the current object list upon EFAULT drm/i915/debugfs: Show all objects in the gtt drm/i915: Record AGP memory type upon error drm/i915: Periodically flush the active lists and requests drm/i915/gtt: Unmap the PCI pages after unbinding them from the GTT drm/i915: Record the error batchbuffer on each ring drm/i915: Include TLB miss overhead for computing WM drm/i915: Propagate error from flushing the ring drm/i915: detect & report PCH display error interrupts drm/i915: cleanup rc6 code drm/i915: fix rc6 enabling around suspend/resume drm/i915: re-enable rc6 support for Ironlake+ drm/i915: Make the ring IMR handling private drm/i915/ringbuffer: Simplify the ring irq refcounting drm/i915/debugfs: Show the per-ring IMR ...
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 410772466fa..0521ecf2601 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -740,7 +740,7 @@ void i915_restore_display(struct drm_device *dev)
I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);
I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL);
- I915_WRITE(MCHBAR_RENDER_STANDBY,
+ I915_WRITE(RSTDBYCTL,
dev_priv->saveMCHBAR_RENDER_STANDBY);
} else {
I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
@@ -811,7 +811,7 @@ int i915_save_state(struct drm_device *dev)
dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR);
dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR);
dev_priv->saveMCHBAR_RENDER_STANDBY =
- I915_READ(MCHBAR_RENDER_STANDBY);
+ I915_READ(RSTDBYCTL);
} else {
dev_priv->saveIER = I915_READ(IER);
dev_priv->saveIMR = I915_READ(IMR);
@@ -822,10 +822,6 @@ int i915_save_state(struct drm_device *dev)
if (IS_GEN6(dev))
gen6_disable_rps(dev);
- /* XXX disabling the clock gating breaks suspend on gm45
- intel_disable_clock_gating(dev);
- */
-
/* Cache mode state */
dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);