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authorPaul Mackerras <paulus@samba.org>2009-04-22 13:02:09 +1000
committerPaul Mackerras <paulus@samba.org>2009-04-22 13:02:09 +1000
commit5bd3ef84d73c2ea7b4babbad060909753c4828d4 (patch)
treefdf2bafb48ae1ed03175f6c77a7548a181e69ee9 /include/asm-mn10300/cache.h
parent0658c16056660886ea2f35c4f038be70a94b1532 (diff)
parent6d25b688ecc488753af3c9e6f6a9a575b863cf37 (diff)
Merge branch 'merge' of git://git.secretlab.ca/git/linux-2.6 into merge
Diffstat (limited to 'include/asm-mn10300/cache.h')
-rw-r--r--include/asm-mn10300/cache.h54
1 files changed, 0 insertions, 54 deletions
diff --git a/include/asm-mn10300/cache.h b/include/asm-mn10300/cache.h
deleted file mode 100644
index 9e01122208a..00000000000
--- a/include/asm-mn10300/cache.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* MN10300 cache management registers
- *
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-
-#ifndef _ASM_CACHE_H
-#define _ASM_CACHE_H
-
-#include <asm/cpu-regs.h>
-#include <asm/proc/cache.h>
-
-#ifndef __ASSEMBLY__
-#define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
-#else
-#define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
-#endif
-
-/* data cache purge registers
- * - read from the register to unconditionally purge that cache line
- * - write address & 0xffffff00 to conditionally purge that cache line
- * - clear LSB to request invalidation as well
- */
-#define DCACHE_PURGE(WAY, ENTRY) \
- __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
- (ENTRY) * L1_CACHE_BYTES, u32)
-
-#define DCACHE_PURGE_WAY0(ENTRY) \
- __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
-#define DCACHE_PURGE_WAY1(ENTRY) \
- __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
-#define DCACHE_PURGE_WAY2(ENTRY) \
- __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
-#define DCACHE_PURGE_WAY3(ENTRY) \
- __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
-
-/* instruction cache access registers */
-#define ICACHE_DATA(WAY, ENTRY, OFF) \
- __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
-#define ICACHE_TAG(WAY, ENTRY) \
- __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
-
-/* instruction cache access registers */
-#define DCACHE_DATA(WAY, ENTRY, OFF) \
- __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
-#define DCACHE_TAG(WAY, ENTRY) \
- __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
-
-#endif /* _ASM_CACHE_H */