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authorChandrabhanu Mahapatra <cmahapatra@ti.com>2011-12-19 14:03:56 +0530
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-01-02 08:51:29 +0200
commit7282f1b7c9b5210114ce1ebb0ea5fe8a63fd5778 (patch)
treebb5dc70dcd6789d22953c45742662edb0422b01f /net/ipv6/esp6.c
parentdebd90749b7440ad5fc02e4f0d1e8a696385f196 (diff)
OMAPDSS: DISPC: Update Scaling Clock Logic
Clock requirements for scaling in OMAP2, OMAP3 and OMAP4 are different. In OMAP2 and OMAP3 the required clock rate is a function of pixel clock, vertical downscale ratio and horizontal downscale ratio whereas in OMAP4 it is a function of pixel clock and horizontal downscale ratio only. Selection of 3-tap vs 5-tap coefficients depends on clock rate line buffer width in OMAP3 whereas in OMAP4 it is independent of clock rate and line buffer width. In OMAP2 3-tap for vertical and 5-tap for horizontal scaling is used. In OMAP4 5-tap is used both for horizontal and vertical scaling for better performance. Also, the number and width of line buffers differs in OMAP3 and OMAP4. So, clock functions have been fined tuned for OMAP3 and support has been added added for OMAP4. This code has been tested on OMAP2, OMAP3 and OMAP4, and scaling issues due to clock errors have been resolved. Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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