mach-ux500: boards merge from GLK 2.6.35

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>

12 files changed, 937 insertions, 316 deletions

diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index f66dfffb68c..d0aef39291a 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -91,5 +91,6 @@ config DB8500_MLOADER
 	help
 	  Adds Modem firmware upload/download support to DB8500.
 
+source "arch/arm/mach-ux500/Kconfig-arch"
 source "arch/arm/mach-ux500/pm/Kconfig"
 endif
diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
new file mode 100644
index 00000000000..8db0680f3fe
--- /dev/null
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -0,0 +1,148 @@
+config U8500_SECURE
+	bool "Support for running in Secure mode"
+	default n
+	help
+		Build the kernel to run in Secure mode.
+
+#Configuration for MCDE setup
+
+if FB_MCDE
+
+menu "Display selection"
+
+config DISPLAY_GENERIC_PRIMARY
+	bool "Generic primary display support"
+	depends on (MACH_U8500_MOP || MACH_B5500)
+	default y
+
+choice
+	prompt "Display port type"
+	depends on DISPLAY_GENERIC_PRIMARY
+	default DISPLAY_GENERIC_DSI_PRIMARY
+	help
+	  Select the kind of display port used for the primary display
+
+config DISPLAY_GENERIC_DSI_PRIMARY
+	bool "DSI display"
+	select MCDE_DISPLAY_GENERIC_DSI
+	help
+	  Say yes here when using a DSI display
+
+config MCDE_DISPLAY_DPI_PRIMARY
+	bool "DPI display"
+	select MCDE_DISPLAY_DPI
+	depends on MACH_8500_MOP
+	help
+	  Say yes here when using a DPI display
+
+endchoice
+
+choice
+	prompt "Color depth"
+	depends on DISPLAY_GENERIC_PRIMARY
+	default MCDE_DISPLAY_PRIMARY_16BPP
+	help
+	  Select color depth for primary display
+
+config MCDE_DISPLAY_PRIMARY_16BPP
+	bool "16 bpp"
+	help
+	  16 bpp color depth
+
+config MCDE_DISPLAY_PRIMARY_32BPP
+	bool "32 bpp"
+	help
+	  32 bpp color depth
+
+endchoice
+
+choice DISPLAY_GENERIC_DSI_PRIMARY_ROTATION
+	prompt "Enable main display rotation"
+	depends on DISPLAY_GENERIC_DSI_PRIMARY
+	default DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
+	help
+	  Set rotation of main display
+
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_0
+	bool "0 degrees"
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
+	bool "90 degrees"
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
+	bool "180 degrees"
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_270
+	bool "270 degrees"
+endchoice
+
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE
+	int
+	depends on DISPLAY_GENERIC_DSI_PRIMARY
+	default "0" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_0
+	default "90" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
+	default "180" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
+	default "270" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_270
+
+config DISPLAY_SONY_SY35560_DSI_PRIMARY
+	bool "Sony SY35560 primary display support"
+	depends on MACH_U8500_PDP
+	select MCDE_DISPLAY_SONY_SY35560_DSI
+	default y
+	help
+	  Say yes here if main display exists
+
+config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
+	bool "Enable v-sync for primary display"
+	depends on DISPLAY_GENERIC_DSI_PRIMARY || DISPLAY_SONY_SY35560_DSI_PRIMARY
+	default n
+	help
+	  Say yes to enable v-sync for primary display
+
+config DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+	bool "Enable auto sync for primary display"
+	depends on DISPLAY_GENERIC_DSI_PRIMARY
+	default n
+	help
+	  Say yes to enable auto sync for primary display
+
+config SONY_SY35560_ENABLE_ESD_CHECK
+	bool "Enable esd status check for primary display"
+	depends on DISPLAY_SONY_SY35560_DSI_PRIMARY
+	default n
+	help
+	  Say yes to enable esd status check for primary display
+
+config DISPLAY_GENERIC_DSI_SECONDARY
+	bool "Sub display support"
+	depends on MACH_U8500
+	select MCDE_DISPLAY_GENERIC_DSI
+	help
+	  Say yes here if sub display exists
+
+config DISPLAY_GENERIC_DSI_SECONDARY_VSYNC
+	bool "Enable v-sync for secondary display"
+	depends on DISPLAY_GENERIC_DSI_SECONDARY
+	help
+	  Say yes to enable v-sync for secondary display
+
+config DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC
+	bool "Enable auto sync for secondary display"
+	depends on DISPLAY_GENERIC_DSI_SECONDARY
+	help
+	  Say yes to enable auto sync for secondary display
+
+config DISPLAY_AB8500_TERTIARY
+	bool "AB8500 TVout display support"
+	depends on MACH_U8500 && !AV8100_SDTV
+	select MCDE_DISPLAY_AB8500_DENC
+	help
+	  Say yes here if tv out support
+
+config DISPLAY_AV8100_TERTIARY
+	bool "AV8100 HDMI/CVBS display support"
+	depends on MACH_U8500
+	select MCDE_DISPLAY_AV8100
+	help
+	  Say yes here if HDMI output support
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index 59444542e67..47bc648a84a 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -9,10 +9,12 @@ endif
 obj-y				:= clock.o cpu.o devices.o devices-common.o \
 				   id.o pins.o usb.o
 obj-y				+= pm/
-obj-$(CONFIG_UX500_SOC_DB5500)	+= cpu-db5500.o dma-db5500.o prcmu-db5500.o
+obj-$(CONFIG_UX500_SOC_DB5500)	+= cpu-db5500.o dma-db5500.o prcmu-db5500.o \
+				   devices-db5500.o
 obj-$(CONFIG_UX500_SOC_DB8500)	+= cpu-db8500.o devices-db8500.o \
 				   prcmu-db8500.o clock-db8500.o \
 				   regulator-db8500.o
+
 obj-$(CONFIG_MACH_U8500)	+= board-mop500.o board-mop500-sdi.o \
 				board-mop500-regulators.o \
 				board-mop500-uib.o board-mop500-stuib.o \
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 200f2a8414c..3a24e8e0419 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -30,6 +30,7 @@
 #include <linux/gpio_keys.h>
 #include <linux/delay.h>
 #include <linux/mfd/ab8500/denc.h>
+#include <linux/spi/stm_msp.h>
 #include <linux/leds_pwm.h>
 #include <linux/pwm_backlight.h>
 
@@ -514,7 +515,14 @@ static struct platform_device ux500_backlight_device[] = {
 
 /* add any platform devices here - TODO */
 static struct platform_device *mop500_platform_devs[] __initdata = {
+	&u8500_shrm_device,
 	&ux500_hwmem_device,
+	&u8500_mcde_device,
+	&u8500_b2r2_device,
+	&u8500_thsens_device,
+#ifdef CONFIG_STE_TRACE_MODEM
+	&u8500_trace_modem,
+#endif
 #ifdef CONFIG_CRYPTO_DEV_UX500_HASH
 	&ux500_hash1_device,
 #endif
@@ -528,8 +536,30 @@ static struct platform_device *mop500_platform_devs[] __initdata = {
 	&ux500_backlight_device[0],
 	&ux500_backlight_device[1],
 #endif
+#ifdef CONFIG_DB8500_MLOADER
+	&mloader_fw_device,
+#endif
 };
 
+/*
+ * MSP-SPI
+ */
+
+#define NUM_MSP_CLIENTS 10
+
+static struct stm_msp_controller mop500_msp2_spi_data = {
+	.id		= 2,
+	.num_chipselect	= NUM_MSP_CLIENTS,
+	.base_addr	= U8500_MSP2_BASE,
+	.device_name	= "msp2",
+};
+
+/*
+ * SSP
+ */
+
+#define NUM_SSP_CLIENTS 10
+
 #ifdef CONFIG_STE_DMA40
 static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
 	.mode = STEDMA40_MODE_LOGICAL,
@@ -557,18 +587,17 @@ static struct pl022_ssp_controller ssp0_platform_data = {
 	.dma_filter = stedma40_filter,
 	.dma_rx_param = &ssp0_dma_cfg_rx,
 	.dma_tx_param = &ssp0_dma_cfg_tx,
-#else
-	.enable_dma = 0,
 #endif
 	/* on this platform, gpio 31,142,144,214 &
 	 * 224 are connected as chip selects
 	 */
-	.num_chipselect = 5,
+	.num_chipselect = NUM_SSP_CLIENTS,
 };
 
 static void __init mop500_spi_init(void)
 {
 	db8500_add_ssp0(&ssp0_platform_data);
+	db8500_add_msp2_spi(&mop500_msp2_spi_data);
 }
 
 #ifdef CONFIG_STE_DMA40
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index fc370df12dd..ba07bee51d2 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -8,10 +8,14 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/amba/bus.h>
+#include <linux/amba/pl022.h>
 #include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/i2c.h>
+#include <linux/i2s/i2s.h>
+#include <linux/mfd/abx500.h>
 #include <linux/led-lm3530.h>
+#include <linux/input/synaptics_i2c_rmi4.h>
 #include <linux/input/matrix_keypad.h>
 
 #include <asm/mach/arch.h>
@@ -20,6 +24,8 @@
 #include <plat/i2c.h>
 
 #include <mach/hardware.h>
+#include <mach/ste-dma40-db5500.h>
+#include <mach/msp.h>
 #include <mach/devices.h>
 #include <mach/setup.h>
 #include <mach/db5500-keypad.h>
@@ -27,9 +33,24 @@
 #include "devices-db5500.h"
 
 /*
- * leds LM3530
+ * Touchscreen
  */
+static struct synaptics_rmi4_platform_data rmi4_i2c_platformdata = {
+	.irq_number	= NOMADIK_GPIO_TO_IRQ(179),
+	.irq_type	= (IRQF_TRIGGER_FALLING | IRQF_SHARED),
+#if CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE == 270
+	.x_flip		= true,
+	.y_flip		= false,
+#else
+	.x_flip		= false,
+	.y_flip		= true,
+#endif
+	.regulator_en	= false,
+};
 
+/*
+ * leds LM3530
+ */
 static struct lm3530_platform_data u5500_als_platform_data = {
 	.mode = LM3530_BL_MODE_MANUAL,
 	.als_input_mode = LM3530_INPUT_ALS1,
@@ -78,6 +99,10 @@ U5500_I2C_CONTROLLER(2,	0xe, 1, 1, 400000, I2C_FREQ_MODE_FAST);
 U5500_I2C_CONTROLLER(3,	0xe, 1, 1, 400000, I2C_FREQ_MODE_FAST);
 
 static struct i2c_board_info __initdata u5500_i2c1_devices[] = {
+	{
+		I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B),
+		.platform_data = &rmi4_i2c_platformdata,
+	},
 };
 
 static struct i2c_board_info __initdata u5500_i2c2_devices[] = {
@@ -88,6 +113,45 @@ static struct i2c_board_info __initdata u5500_i2c2_devices[] = {
 	},
 };
 
+static struct resource ab5500_resources[] = {
+	[0] = {
+		/*TODO Change this when prcmu driver arrives */
+		.start = IRQ_DB5500_AB5500,
+		.end = IRQ_DB5500_AB5500,
+		.flags = IORESOURCE_IRQ
+	}
+};
+
+static struct ab5500_platform_data ab5500_plf_data = {
+	.irq = {
+		.base = IRQ_AB5500_BASE,
+		.count = AB5500_NR_IRQS,
+	},
+	.dev_data = {
+	},
+	.dev_data_sz = {
+	},
+	.init_settings = NULL,
+	.init_settings_sz = 0,
+};
+
+static struct platform_device u5500_ab5500_device = {
+	.name = "ab5500-core",
+	.id = 0,
+	.dev = {
+		.platform_data = &ab5500_plf_data,
+	},
+	.num_resources = 1,
+	.resource = ab5500_resources,
+};
+
+static struct platform_device *u5500_platform_devices[] __initdata = {
+	&u5500_ab5500_device,
+	&u5500_mcde_device,
+	&ux500_hwmem_device,
+	&u5500_b2r2_device,
+};
+
 static void __init u5500_i2c_init(void)
 {
 	db5500_add_i2c1(&u5500_i2c1_data);
@@ -125,6 +189,92 @@ static struct db5500_keypad_platform_data u5500_keypad_board = {
 	.debounce_ms	= 40, /* milliseconds */
 };
 
+/*
+ * MSP
+ */
+
+#define MSP_DMA(num, eventline)					\
+static struct stedma40_chan_cfg msp##num##_dma_rx = {		\
+	.high_priority = true,					\
+	.dir = STEDMA40_PERIPH_TO_MEM,				\
+	.src_dev_type = eventline##_RX,				\
+	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,		\
+	.src_info.psize = STEDMA40_PSIZE_LOG_4,			\
+	.dst_info.psize = STEDMA40_PSIZE_LOG_4,			\
+};								\
+								\
+static struct stedma40_chan_cfg msp##num##_dma_tx = {		\
+	.high_priority = true,					\
+	.dir = STEDMA40_MEM_TO_PERIPH,				\
+	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,		\
+	.dst_dev_type = eventline##_TX,				\
+	.src_info.psize = STEDMA40_PSIZE_LOG_4,			\
+	.dst_info.psize = STEDMA40_PSIZE_LOG_4,			\
+}
+
+MSP_DMA(0, DB5500_DMA_DEV9_MSP0);
+MSP_DMA(1, DB5500_DMA_DEV10_MSP1);
+MSP_DMA(2, DB5500_DMA_DEV11_MSP2);
+
+static struct msp_i2s_platform_data u5500_msp0_data = {
+	.id		= MSP_0_I2S_CONTROLLER,
+	.msp_i2s_dma_rx	= &msp0_dma_rx,
+	.msp_i2s_dma_tx	= &msp0_dma_tx,
+};
+
+static struct msp_i2s_platform_data u5500_msp1_data = {
+	.id		= MSP_1_I2S_CONTROLLER,
+	.msp_i2s_dma_rx	= &msp1_dma_rx,
+	.msp_i2s_dma_tx	= &msp1_dma_tx,
+};
+
+static struct msp_i2s_platform_data u5500_msp2_data = {
+	.id		= MSP_2_I2S_CONTROLLER,
+	.msp_i2s_dma_rx	= &msp2_dma_rx,
+	.msp_i2s_dma_tx	= &msp2_dma_tx,
+};
+
+static struct i2s_board_info stm_i2s_board_info[] __initdata = {
+	{
+		.modalias	= "i2s_device.0",
+		.id		= 0,
+		.chip_select	= 0,
+	},
+	{
+		.modalias	= "i2s_device.1",
+		.id		= 1,
+		.chip_select	= 1,
+	},
+	{
+		.modalias	= "i2s_device.2",
+		.id		= 2,
+		.chip_select	= 2,
+	},
+};
+
+/*
+ * SPI
+ */
+
+static struct pl022_ssp_controller u5500_spi1_data = {
+	.bus_id		= 1,
+	.num_chipselect	= 4,	/* 3 possible CS lines + 1 for tests */
+};
+
+static void __init u5500_spi_init(void)
+{
+	db5500_add_spi1(&u5500_spi1_data);
+}
+
+static void __init u5500_msp_init(void)
+{
+	db5500_add_msp0_i2s(&u5500_msp0_data);
+	db5500_add_msp1_i2s(&u5500_msp1_data);
+	db5500_add_msp2_i2s(&u5500_msp2_data);
+
+	i2s_register_board_info(ARRAY_AND_SIZE(stm_i2s_board_info));
+}
+
 static void __init u5500_uart_init(void)
 {
 	db5500_add_uart0(NULL);
@@ -136,11 +286,16 @@ static void __init u5500_init_machine(void)
 {
 	u5500_init_devices();
 	u5500_i2c_init();
+	u5500_msp_init();
+	u5500_spi_init();
 
 	u5500_sdi_init();
 	u5500_uart_init();
 
 	db5500_add_keypad(&u5500_keypad_board);
+
+	platform_add_devices(u5500_platform_devices,
+			     ARRAY_SIZE(u5500_platform_devices));
 }
 
 MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
index 7825705033b..8ee40ff9825 100644
--- a/arch/arm/mach-ux500/devices-common.h
+++ b/arch/arm/mach-ux500/devices-common.h
@@ -17,18 +17,20 @@ dbx500_add_platform_device_4k1irq(const char *name, int id,
 				  resource_size_t base,
 				  int irq, void *pdata);
 
-struct spi_master_cntlr;
+struct stm_msp_controller;
 
 static inline struct amba_device *
 dbx500_add_msp_spi(const char *name, resource_size_t base, int irq,
-		   struct spi_master_cntlr *pdata)
+		   struct stm_msp_controller *pdata)
 {
 	return dbx500_add_amba_device(name, base, irq, pdata, 0);
 }
 
+struct pl022_ssp_controller;
+
 static inline struct amba_device *
 dbx500_add_spi(const char *name, resource_size_t base, int irq,
-	       struct spi_master_cntlr *pdata,
+	       struct pl022_ssp_controller *pdata,
 	       u32 periphid)
 {
 	return dbx500_add_amba_device(name, base, irq, pdata, periphid);
diff --git a/arch/arm/mach-ux500/devices-db5500.c b/arch/arm/mach-ux500/devices-db5500.c
new file mode 100644
index 00000000000..0456e430dec
--- /dev/null
+++ b/arch/arm/mach-ux500/devices-db5500.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
+ *
+ * Author: Pierre Peiffer <pierre.peiffer@stericsson.com> for ST-Ericsson.
+ * for the System Trace Module part.
+ *
+ * License terms: GNU General Public License (GPL) version 2
+ */
+
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#include <mach/hardware.h>
+#include <mach/devices.h>
+
+#include <video/mcde.h>
+#include <mach/db5500-regs.h>
+
+#include <mach/prcmu-fw-api.h>
+
+#define GPIO_DATA(_name, first, num)					\
+	{								\
+		.name		= _name,				\
+		.first_gpio	= first,				\
+		.first_irq	= NOMADIK_GPIO_TO_IRQ(first),		\
+		.num_gpio	= num,					\
+	}
+
+#define GPIO_RESOURCE(block)						\
+	{								\
+		.start	= U5500_GPIOBANK##block##_BASE,			\
+		.end	= U5500_GPIOBANK##block##_BASE + 127,		\
+		.flags	= IORESOURCE_MEM,				\
+	},								\
+	{								\
+		.start	= IRQ_DB5500_GPIO##block,			\
+		.end	= IRQ_DB5500_GPIO##block,			\
+		.flags	= IORESOURCE_IRQ,				\
+	}
+
+#define GPIO_DEVICE(block)						\
+	{								\
+		.name		= "gpio",				\
+		.id		= block,				\
+		.num_resources	= 2,					\
+		.resource	= &u5500_gpio_resources[block * 2],	\
+		.dev = {						\
+			.platform_data = &u5500_gpio_data[block],	\
+		},							\
+	}
+
+static struct nmk_gpio_platform_data u5500_gpio_data[] = {
+	GPIO_DATA("GPIO-0-31", 0, 32),
+	GPIO_DATA("GPIO-32-63", 32, 4), /* 36..63 not routed to pin */
+	GPIO_DATA("GPIO-64-95", 64, 19), /* 83..95 not routed to pin */
+	GPIO_DATA("GPIO-96-127", 96, 6), /* 102..127 not routed to pin */
+	GPIO_DATA("GPIO-128-159", 128, 21), /* 149..159 not routed to pin */
+	GPIO_DATA("GPIO-160-191", 160, 32),
+	GPIO_DATA("GPIO-192-223", 192, 32),
+	GPIO_DATA("GPIO-224-255", 224, 4), /* 228..255 not routed to pin */
+};
+
+static struct resource u5500_gpio_resources[] = {
+	GPIO_RESOURCE(0),
+	GPIO_RESOURCE(1),
+	GPIO_RESOURCE(2),
+	GPIO_RESOURCE(3),
+	GPIO_RESOURCE(4),
+	GPIO_RESOURCE(5),
+	GPIO_RESOURCE(6),
+	GPIO_RESOURCE(7),
+};
+
+struct platform_device u5500_gpio_devs[] = {
+	GPIO_DEVICE(0),
+	GPIO_DEVICE(1),
+	GPIO_DEVICE(2),
+	GPIO_DEVICE(3),
+	GPIO_DEVICE(4),
+	GPIO_DEVICE(5),
+	GPIO_DEVICE(6),
+	GPIO_DEVICE(7),
+};
+
+#define U5500_PWM_SIZE 0x20
+static struct resource u5500_pwm0_resource[] = {
+	{
+		.name = "PWM_BASE",
+		.start = U5500_PWM_BASE,
+		.end = U5500_PWM_BASE + U5500_PWM_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct resource u5500_pwm1_resource[] = {
+	{
+		.name = "PWM_BASE",
+		.start = U5500_PWM_BASE + U5500_PWM_SIZE,
+		.end = U5500_PWM_BASE + U5500_PWM_SIZE * 2 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct resource u5500_pwm2_resource[] = {
+	{
+		.name = "PWM_BASE",
+		.start = U5500_PWM_BASE + U5500_PWM_SIZE * 2,
+		.end = U5500_PWM_BASE + U5500_PWM_SIZE * 3 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct resource u5500_pwm3_resource[] = {
+	{
+		.name = "PWM_BASE",
+		.start = U5500_PWM_BASE + U5500_PWM_SIZE * 3,
+		.end = U5500_PWM_BASE + U5500_PWM_SIZE * 4 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct platform_device u5500_pwm0_device = {
+	.id = 0,
+	.name = "pwm",
+	.resource = u5500_pwm0_resource,
+	.num_resources = ARRAY_SIZE(u5500_pwm0_resource),
+};
+
+struct platform_device u5500_pwm1_device = {
+	.id = 1,
+	.name = "pwm",
+	.resource = u5500_pwm1_resource,
+	.num_resources = ARRAY_SIZE(u5500_pwm1_resource),
+};
+
+struct platform_device u5500_pwm2_device = {
+	.id = 2,
+	.name = "pwm",
+	.resource = u5500_pwm2_resource,
+	.num_resources = ARRAY_SIZE(u5500_pwm2_resource),
+};
+
+struct platform_device u5500_pwm3_device = {
+	.id = 3,
+	.name = "pwm",
+	.resource = u5500_pwm3_resource,
+	.num_resources = ARRAY_SIZE(u5500_pwm3_resource),
+};
+
+static struct resource mcde_resources[] = {
+	[0] = {
+		.name  = MCDE_IO_AREA,
+		.start = U5500_MCDE_BASE,
+		.end   = U5500_MCDE_BASE + U5500_MCDE_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name  = MCDE_IO_AREA,
+		.start = U5500_DSI_LINK1_BASE,
+		.end   = U5500_DSI_LINK1_BASE + U5500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[2] = {
+		.name  = MCDE_IO_AREA,
+		.start = U5500_DSI_LINK2_BASE,
+		.end   = U5500_DSI_LINK2_BASE + U5500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[3] = {
+		.name  = MCDE_IRQ,
+		.start = IRQ_DB5500_DISP,
+		.end   = IRQ_DB5500_DISP,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static int mcde_platform_enable(void)
+{
+	return prcmu_enable_dsipll();
+}
+
+static int mcde_platform_disable(void)
+{
+	return prcmu_disable_dsipll();
+}
+
+static struct mcde_platform_data mcde_pdata = {
+	.num_dsilinks = 2,
+	.syncmux = 0x01,
+	.num_channels = 2,
+	.num_overlays = 3,
+	.regulator_vana_id = "v-ana",
+	.clock_dsi_id = "hdmi",
+	.clock_dsi_lp_id = "tv",
+	.clock_mcde_id = "mcde",
+	.platform_enable = mcde_platform_enable,
+	.platform_disable = mcde_platform_disable,
+};
+
+struct platform_device u5500_mcde_device = {
+	.name = "mcde",
+	.id = -1,
+	.dev = {
+		.platform_data = &mcde_pdata,
+	},
+	.num_resources = ARRAY_SIZE(mcde_resources),
+	.resource = mcde_resources,
+};
+
+static struct resource b2r2_resources[] = {
+	[0] = {
+		.start	= U5500_B2R2_BASE,
+		.end	= U5500_B2R2_BASE + ((4*1024)-1),
+		.name	= "b2r2_base",
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.name  = "B2R2_IRQ",
+		.start = IRQ_DB5500_B2R2,
+		.end   = IRQ_DB5500_B2R2,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device u5500_b2r2_device = {
+	.name	= "b2r2",
+	.id	= 0,
+	.dev	= {
+		.init_name = "b2r2_bus",
+		.coherent_dma_mask = ~0,
+	},
+	.num_resources	= ARRAY_SIZE(b2r2_resources),
+	.resource	= b2r2_resources,
+};
+
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 40330c711d5..aef4dcf891c 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -23,6 +23,8 @@
 #include <mach/devices.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
+#include <video/mcde.h>
+#include <mach/prcmu-fw-api.h>
 #include <mach/prcmu-regs.h>
 
 #include <trace/stm.h>
@@ -177,6 +179,211 @@ struct platform_device u8500_dma40_device = {
 	.resource = dma40_resources
 };
 
+static struct resource u8500_shrm_resources[] = {
+	[0] = {
+		.start = U8500_SHRM_GOP_INTERRUPT_BASE,
+		.end = U8500_SHRM_GOP_INTERRUPT_BASE + ((4*4)-1),
+		.name = "shrm_gop_register_base",
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = IRQ_CA_WAKE_REQ_V1,
+		.end = IRQ_CA_WAKE_REQ_V1,
+		.name = "ca_irq_wake_req",
+		.flags = IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start = IRQ_AC_READ_NOTIFICATION_0_V1,
+		.end = IRQ_AC_READ_NOTIFICATION_0_V1,
+		.name = "ac_read_notification_0_irq",
+		.flags = IORESOURCE_IRQ,
+	},
+	[3] = {
+		.start = IRQ_AC_READ_NOTIFICATION_1_V1,
+		.end = IRQ_AC_READ_NOTIFICATION_1_V1,
+		.name = "ac_read_notification_1_irq",
+		.flags = IORESOURCE_IRQ,
+	},
+	[4] = {
+		.start = IRQ_CA_MSG_PEND_NOTIFICATION_0_V1,
+		.end = IRQ_CA_MSG_PEND_NOTIFICATION_0_V1,
+		.name = "ca_msg_pending_notification_0_irq",
+		.flags = IORESOURCE_IRQ,
+	},
+	[5] = {
+		.start = IRQ_CA_MSG_PEND_NOTIFICATION_1_V1,
+		.end = IRQ_CA_MSG_PEND_NOTIFICATION_1_V1,
+		.name = "ca_msg_pending_notification_1_irq",
+		.flags = IORESOURCE_IRQ,
+	}
+};
+
+struct platform_device u8500_shrm_device = {
+	.name = "u8500_shrm",
+	.id = 0,
+	.dev = {
+		.init_name = "shrm_bus",
+		.coherent_dma_mask = ~0,
+	},
+
+	.num_resources = ARRAY_SIZE(u8500_shrm_resources),
+	.resource = u8500_shrm_resources
+};
+
+static struct resource mcde_resources[] = {
+	[0] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_MCDE_BASE,
+		.end   = U8500_MCDE_BASE + U8500_MCDE_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_DSI_LINK1_BASE,
+		.end   = U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[2] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_DSI_LINK2_BASE,
+		.end   = U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[3] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_DSI_LINK3_BASE,
+		.end   = U8500_DSI_LINK3_BASE + U8500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[4] = {
+		.name  = MCDE_IRQ,
+		.start = IRQ_DB8500_DISP,
+		.end   = IRQ_DB8500_DISP,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static int mcde_platform_enable(void)
+{
+	return prcmu_enable_dsipll();
+}
+
+static int mcde_platform_disable(void)
+{
+	return prcmu_disable_dsipll();
+}
+
+static struct mcde_platform_data mcde_pdata = {
+	.num_dsilinks = 3,
+	/*
+	 * [0] = 3: 24 bits DPI: connect LSB Ch B to D[0:7]
+	 * [3] = 4: 24 bits DPI: connect MID Ch B to D[24:31]
+	 * [4] = 5: 24 bits DPI: connect MSB Ch B to D[32:39]
+	 *
+	 * [1] = 3: TV out     : connect LSB Ch B to D[8:15]
+	 */
+#define DONT_CARE 0
+	.outmux = { 3, 3, DONT_CARE, 4, 5 },
+#undef DONT_CARE
+	.syncmux = 0x00,  /* DPI channel A and B on output pins A and B resp */
+	.num_channels = 4,
+	.num_overlays = 6,
+	.regulator_vana_id = "v-ana",
+	.regulator_mcde_epod_id = "vsupply",
+	.regulator_esram_epod_id = "v-esram34",
+	.clock_dsi_id = "hdmi",
+	.clock_dsi_lp_id = "tv",
+	.clock_dpi_id = "lcd",
+	.clock_mcde_id = "mcde",
+	.platform_enable = mcde_platform_enable,
+	.platform_disable = mcde_platform_disable,
+};
+
+struct platform_device u8500_mcde_device = {
+	.name = "mcde",
+	.id = -1,
+	.dev = {
+		.platform_data = &mcde_pdata,
+	},
+	.num_resources = ARRAY_SIZE(mcde_resources),
+	.resource = mcde_resources,
+};
+
+static struct resource b2r2_resources[] = {
+	[0] = {
+		.start	= U8500_B2R2_BASE,
+		.end	= U8500_B2R2_BASE + ((4*1024)-1),
+		.name	= "b2r2_base",
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.name  = "B2R2_IRQ",
+		.start = IRQ_DB8500_B2R2,
+		.end   = IRQ_DB8500_B2R2,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device u8500_b2r2_device = {
+	.name	= "b2r2",
+	.id	= 0,
+	.dev	= {
+		.init_name = "b2r2_bus",
+		.coherent_dma_mask = ~0,
+	},
+	.num_resources	= ARRAY_SIZE(b2r2_resources),
+	.resource	= b2r2_resources,
+};
+
+/*
+ * WATCHDOG
+ */
+
+static struct resource ux500_wdt_resources[] = {
+	[0] = {
+		.start  = U8500_TWD_BASE,
+		.end    = U8500_TWD_BASE+0x37,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start  = IRQ_LOCALWDOG,
+		.end  = IRQ_LOCALWDOG,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+struct platform_device ux500_wdt_device = {
+	.name           = "mpcore_wdt",
+	.id             = -1,
+	.resource       = ux500_wdt_resources,
+	.num_resources  = ARRAY_SIZE(ux500_wdt_resources),
+};
+
+/*
+ * Thermal Sensor
+ */
+
+static struct resource u8500_thsens_resources[] = {
+	{
+		.name = "IRQ_HOTMON_LOW",
+		.start  = IRQ_PRCMU_HOTMON_LOW,
+		.end    = IRQ_PRCMU_HOTMON_LOW,
+		.flags  = IORESOURCE_IRQ,
+	},
+	{
+		.name = "IRQ_HOTMON_HIGH",
+		.start  = IRQ_PRCMU_HOTMON_HIGH,
+		.end    = IRQ_PRCMU_HOTMON_HIGH,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device u8500_thsens_device = {
+	.name           = "db8500_temp",
+	.resource       = u8500_thsens_resources,
+	.num_resources  = ARRAY_SIZE(u8500_thsens_resources),
+};
+
 void dma40_u8500ed_fixup(void)
 {
 	dma40_plat_data.memcpy = NULL;
diff --git a/arch/arm/mach-ux500/dma-db8500.c b/arch/arm/mach-ux500/dma-db8500.c
deleted file mode 100644
index 79a5b2eff9d..00000000000
--- a/arch/arm/mach-ux500/dma-db8500.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2007-2010
- *
- * Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson
- * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
- *
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/hsi.h>
-#include <linux/hsi-legacy.h>
-
-#include <plat/ste_dma40.h>
-
-#include <mach/hsi-stm.h>
-#include <mach/setup.h>
-#include <mach/ste-dma40-db8500.h>
-
-#include "pm/context.h"
-
-static struct resource dma40_resources[] = {
-	[0] = {
-		.start = U8500_DMA_BASE,
-		.end   = U8500_DMA_BASE + SZ_4K - 1,
-		.flags = IORESOURCE_MEM,
-		.name  = "base",
-	},
-	[1] = {
-		.start = U8500_DMA_LCPA_BASE,
-		.end   = U8500_DMA_LCPA_BASE + 2 * SZ_1K - 1,
-		.flags = IORESOURCE_MEM,
-		.name  = "lcpa",
-	},
-	[2] = {
-		.start = IRQ_DB8500_DMA,
-		.end   = IRQ_DB8500_DMA,
-		.flags = IORESOURCE_IRQ
-	}
-};
-
-/* Default configuration for physcial memcpy */
-static struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
-	.mode = STEDMA40_MODE_PHYSICAL,
-	.dir = STEDMA40_MEM_TO_MEM,
-
-	.src_info.data_width = STEDMA40_BYTE_WIDTH,
-	.src_info.psize = STEDMA40_PSIZE_PHY_1,
-	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
-
-	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
-	.dst_info.psize = STEDMA40_PSIZE_PHY_1,
-	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
-
-};
-
-/* Default configuration for logical memcpy */
-static struct stedma40_chan_cfg dma40_memcpy_conf_log = {
-	.dir = STEDMA40_MEM_TO_MEM,
-
-	.src_info.data_width = STEDMA40_BYTE_WIDTH,
-	.src_info.psize = STEDMA40_PSIZE_LOG_1,
-	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
-
-	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
-	.dst_info.psize = STEDMA40_PSIZE_LOG_1,
-	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
-
-};
-
-/*
- * Mapping between soruce event lines and physical device address
- * This was created assuming that the event line is tied to a device and
- * therefore the address is constant, however this is not true for at least
- * USB, and the values are just placeholders for USB.  This table is preserved
- * and used for now.
- */
-static dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = {
-	[DB8500_DMA_DEV0_SPI0_RX] = 0,
-	[DB8500_DMA_DEV1_SD_MMC0_RX] = 0,
-	[DB8500_DMA_DEV2_SD_MMC1_RX] = 0,
-	[DB8500_DMA_DEV3_SD_MMC2_RX] = 0,
-	[DB8500_DMA_DEV4_I2C1_RX] = 0,
-	[DB8500_DMA_DEV5_I2C3_RX] = 0,
-	[DB8500_DMA_DEV6_I2C2_RX] = 0,
-	[DB8500_DMA_DEV7_I2C4_RX] = 0,
-	[DB8500_DMA_DEV8_SSP0_RX] =  U8500_SSP0_BASE + SSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV9_SSP1_RX] = 0,
-	[DB8500_DMA_DEV10_MCDE_RX] = 0,
-	[DB8500_DMA_DEV11_UART2_RX] = 0,
-	[DB8500_DMA_DEV12_UART1_RX] = 0,
-	[DB8500_DMA_DEV13_UART0_RX] = 0,
-	[DB8500_DMA_DEV14_MSP2_RX] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV15_I2C0_RX] = 0,
-	[DB8500_DMA_DEV16_USB_OTG_IEP_7_15] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV17_USB_OTG_IEP_6_14] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV18_USB_OTG_IEP_5_13] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV19_USB_OTG_IEP_4_12] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV20_SLIM0_CH0_RX_HSI_RX_CH0] = U8500_HSIR_BASE + 0x0 + HSI_RX_BUFFERX,
-	[DB8500_DMA_DEV21_SLIM0_CH1_RX_HSI_RX_CH1] = U8500_HSIR_BASE + 0x4 + HSI_RX_BUFFERX,
-	[DB8500_DMA_DEV22_SLIM0_CH2_RX_HSI_RX_CH2] = U8500_HSIR_BASE + 0x8 + HSI_RX_BUFFERX,
-	[DB8500_DMA_DEV23_SLIM0_CH3_RX_HSI_RX_CH3] = U8500_HSIR_BASE + 0xC + HSI_RX_BUFFERX,
-	[DB8500_DMA_DEV24_SRC_SXA0_RX_TX] = 0,
-	[DB8500_DMA_DEV25_SRC_SXA1_RX_TX] = 0,
-	[DB8500_DMA_DEV26_SRC_SXA2_RX_TX] = 0,
-	[DB8500_DMA_DEV27_SRC_SXA3_RX_TX] = 0,
-	[DB8500_DMA_DEV28_SD_MM2_RX] = U8500_SDI2_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV29_SD_MM0_RX] = U8500_SDI0_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV30_MSP1_RX] = U8500_MSP1_BASE + MSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV32_SD_MM1_RX] = U8500_SDI1_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV33_SPI2_RX] = 0,
-	[DB8500_DMA_DEV34_I2C3_RX2] = 0,
-	[DB8500_DMA_DEV35_SPI1_RX] = 0,
-	[DB8500_DMA_DEV36_USB_OTG_IEP_3_11] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV37_USB_OTG_IEP_2_10] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV38_USB_OTG_IEP_1_9] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV39_USB_OTG_IEP_8] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV40_SPI3_RX] = 0,
-	[DB8500_DMA_DEV41_SD_MM3_RX] = 0,
-	[DB8500_DMA_DEV42_SD_MM4_RX] = U8500_SDI4_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV43_SD_MM5_RX] = 0,
-	[DB8500_DMA_DEV44_SRC_SXA4_RX_TX] = 0,
-	[DB8500_DMA_DEV45_SRC_SXA5_RX_TX] = 0,
-	[DB8500_DMA_DEV46_SLIM0_CH8_RX_SRC_SXA6_RX_TX] = 0,
-	[DB8500_DMA_DEV47_SLIM0_CH9_RX_SRC_SXA7_RX_TX] = 0,
-	[DB8500_DMA_DEV48_CAC1_RX] = U8500_CRYP1_BASE + CRYP1_RX_REG_OFFSET,
-	/* 49, 50 and 51 are not used */
-	[DB8500_DMA_DEV52_SLIM0_CH4_RX_HSI_RX_CH4] = 0,
-	[DB8500_DMA_DEV53_SLIM0_CH5_RX_HSI_RX_CH5] = 0,
-	[DB8500_DMA_DEV54_SLIM0_CH6_RX_HSI_RX_CH6] = 0,
-	[DB8500_DMA_DEV55_SLIM0_CH7_RX_HSI_RX_CH7] = 0,
-	/* 56, 57, 58, 59 and 60 are not used */
-	[DB8500_DMA_DEV61_CAC0_RX] = 0,
-	/* 62 and 63 are not used */
-};
-
-/* Mapping between destination event lines and physical device address */
-static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = {
-	[DB8500_DMA_DEV0_SPI0_TX] = 0,
-	[DB8500_DMA_DEV1_SD_MMC0_TX] = 0,
-	[DB8500_DMA_DEV2_SD_MMC1_TX] = 0,
-	[DB8500_DMA_DEV3_SD_MMC2_TX] = 0,
-	[DB8500_DMA_DEV4_I2C1_TX] = 0,
-	[DB8500_DMA_DEV5_I2C3_TX] = 0,
-	[DB8500_DMA_DEV6_I2C2_TX] = 0,
-	[DB8500_DMA_DEV7_I2C4_TX] = 0,
-	[DB8500_DMA_DEV8_SSP0_TX] = U8500_SSP0_BASE + SSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV9_SSP1_TX] = 0,
-	/* 10 is not used*/
-	[DB8500_DMA_DEV11_UART2_TX] = 0,
-	[DB8500_DMA_DEV12_UART1_TX] = 0,
-	[DB8500_DMA_DEV13_UART0_TX] = 0,
-	[DB8500_DMA_DEV14_MSP2_TX] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV15_I2C0_TX] = 0,
-	[DB8500_DMA_DEV16_USB_OTG_OEP_7_15] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV17_USB_OTG_OEP_6_14] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV18_USB_OTG_OEP_5_13] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV19_USB_OTG_OEP_4_12] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV20_SLIM0_CH0_TX_HSI_TX_CH0] = U8500_HSIT_BASE + 0x0 + HSI_TX_BUFFERX,
-	[DB8500_DMA_DEV21_SLIM0_CH1_TX_HSI_TX_CH1] = U8500_HSIT_BASE + 0x4 + HSI_TX_BUFFERX,
-	[DB8500_DMA_DEV22_SLIM0_CH2_TX_HSI_TX_CH2] = U8500_HSIT_BASE + 0x8 + HSI_TX_BUFFERX,
-	[DB8500_DMA_DEV23_SLIM0_CH3_TX_HSI_TX_CH3] = U8500_HSIT_BASE + 0xC + HSI_TX_BUFFERX,
-	[DB8500_DMA_DEV24_DST_SXA0_RX_TX] = 0,
-	[DB8500_DMA_DEV25_DST_SXA1_RX_TX] = 0,
-	[DB8500_DMA_DEV26_DST_SXA2_RX_TX] = 0,
-	[DB8500_DMA_DEV27_DST_SXA3_RX_TX] = 0,
-	[DB8500_DMA_DEV28_SD_MM2_TX] = U8500_SDI2_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV29_SD_MM0_TX] = U8500_SDI0_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV30_MSP1_TX] = U8500_MSP1_BASE + MSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV32_SD_MM1_TX] = U8500_SDI1_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV33_SPI2_TX] = 0,
-	[DB8500_DMA_DEV34_I2C3_TX2] = 0,
-	[DB8500_DMA_DEV35_SPI1_TX] = 0,
-	[DB8500_DMA_DEV36_USB_OTG_OEP_3_11] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV37_USB_OTG_OEP_2_10] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV38_USB_OTG_OEP_1_9] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV39_USB_OTG_OEP_8] = U8500_USBOTG_BASE,
-	[DB8500_DMA_DEV40_SPI3_TX] = 0,
-	[DB8500_DMA_DEV41_SD_MM3_TX] = 0,
-	[DB8500_DMA_DEV42_SD_MM4_TX] = U8500_SDI4_BASE + SD_MMC_TX_RX_REG_OFFSET,
-	[DB8500_DMA_DEV43_SD_MM5_TX] = 0,
-	[DB8500_DMA_DEV44_DST_SXA4_RX_TX] = 0,
-	[DB8500_DMA_DEV45_DST_SXA5_RX_TX] = 0,
-	[DB8500_DMA_DEV46_SLIM0_CH8_TX_DST_SXA6_RX_TX] = 0,
-	[DB8500_DMA_DEV47_SLIM0_CH9_TX_DST_SXA7_RX_TX] = 0,
-	[DB8500_DMA_DEV48_CAC1_TX] = U8500_CRYP1_BASE + CRYP1_TX_REG_OFFSET,
-	[DB8500_DMA_DEV49_CAC1_TX_HAC1_TX] = 0,
-	[DB8500_DMA_DEV50_HAC1_TX] = 0,
-	[DB8500_DMA_MEMCPY_TX_0] = 0,
-	[DB8500_DMA_DEV52_SLIM1_CH4_TX_HSI_TX_CH4] = 0,
-	[DB8500_DMA_DEV53_SLIM1_CH5_TX_HSI_TX_CH5] = 0,
-	[DB8500_DMA_DEV54_SLIM1_CH6_TX_HSI_TX_CH6] = 0,
-	[DB8500_DMA_DEV55_SLIM1_CH7_TX_HSI_TX_CH7] = 0,
-	[DB8500_DMA_MEMCPY_TX_1] = 0,
-	[DB8500_DMA_MEMCPY_TX_2] = 0,
-	[DB8500_DMA_MEMCPY_TX_3] = 0,
-	[DB8500_DMA_MEMCPY_TX_4] = 0,
-	[DB8500_DMA_MEMCPY_TX_5] = 0,
-	[DB8500_DMA_DEV61_CAC0_TX] = 0,
-	[DB8500_DMA_DEV62_CAC0_TX_HAC0_TX] = 0,
-	[DB8500_DMA_DEV63_HAC0_TX] = 0,
-};
-
-/* Reserved event lines for memcpy only */
-static int dma40_memcpy_event[] = {
-	DB8500_DMA_MEMCPY_TX_0,
-	DB8500_DMA_MEMCPY_TX_1,
-	DB8500_DMA_MEMCPY_TX_2,
-	DB8500_DMA_MEMCPY_TX_3,
-	DB8500_DMA_MEMCPY_TX_4,
-	DB8500_DMA_MEMCPY_TX_5,
-};
-
-static struct stedma40_platform_data dma40_plat_data = {
-	.dev_len = ARRAY_SIZE(dma40_rx_map),
-	.dev_rx = dma40_rx_map,
-	.dev_tx = dma40_tx_map,
-	.memcpy = dma40_memcpy_event,
-	.memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
-	.memcpy_conf_phy = &dma40_memcpy_conf_phy,
-	.memcpy_conf_log = &dma40_memcpy_conf_log,
-	/* Audio is using physical channel 2 from MMDSP */
-	.disabled_channels = {2, -1},
-};
-
-#ifdef CONFIG_UX500_CONTEXT
-#define D40_DREG_GCC		0x000
-#define D40_DREG_LCPA		0x020
-
-static void __iomem *base;
-
-static int dma_context_notifier_call(struct notifier_block *this,
-				     unsigned long event, void *data)
-{
-	static unsigned long lcpa;
-	static unsigned long gcc;
-
-	switch (event) {
-	case CONTEXT_APE_SAVE:
-		lcpa = readl(base + D40_DREG_LCPA);
-		gcc = readl(base + D40_DREG_GCC);
-		break;
-
-	case CONTEXT_APE_RESTORE:
-		writel(gcc, base + D40_DREG_GCC);
-		writel(lcpa, base + D40_DREG_LCPA);
-		break;
-	}
-	return NOTIFY_OK;
-}
-
-static struct notifier_block dma_context_notifier = {
-	.notifier_call = dma_context_notifier_call,
-};
-
-static void dma_context_notifier_init(void)
-{
-	base = ioremap(dma40_resources[0].start, resource_size(&dma40_resources[0]));
-	if (WARN_ON(!base))
-		return;
-
-	WARN_ON(context_ape_notifier_register(&dma_context_notifier));
-}
-#else
-static void dma_context_notifier_init(void)
-{
-}
-#endif
-
-static struct platform_device dma40_device = {
-	.dev = {
-		.platform_data = &dma40_plat_data,
-	},
-	.name		= "dma40",
-	.id		= 0,
-	.num_resources	= ARRAY_SIZE(dma40_resources),
-	.resource	= dma40_resources
-};
-
-void __init db8500_dma_init(void)
-{
-	int ret;
-
-	if (cpu_is_u8500ed()) {
-		dma40_plat_data.memcpy = NULL;
-		dma40_plat_data.memcpy_len = 0;
-		dma40_resources[0].start = U8500_DMA_BASE_ED;
-		dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
-		dma40_resources[1].start = U8500_DMA_LCPA_BASE_ED;
-		dma40_resources[1].end = U8500_DMA_LCPA_BASE_ED + 2 * SZ_1K - 1;
-	}
-
-	/* On DB8500v2+, RX line 30 is connected to MSP3 instead of MSP1 */
-	if (!cpu_is_u8500ed() && !cpu_is_u8500v1())
-		dma40_rx_map[DB8500_DMA_DEV30_MSP3_RX] = U8500_MSP3_BASE
-							 + MSP_TX_RX_REG_OFFSET;
-
-	ret = platform_device_register(&dma40_device);
-	if (ret)
-		dev_err(&dma40_device.dev, "unable to register device: %d\n", ret);
-
-	dma_context_notifier_init();
-}
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h
index 28f189a0091..92d5a0e95fa 100644
--- a/arch/arm/mach-ux500/include/mach/devices.h
+++ b/arch/arm/mach-ux500/include/mach/devices.h
@@ -13,12 +13,21 @@ struct amba_device;
 extern struct platform_device u5500_gpio_devs[];
 extern struct platform_device u8500_gpio_devs[];
 
+extern struct platform_device u8500_mcde_device;
+extern struct platform_device u5500_mcde_device;
+extern struct platform_device u8500_shrm_device;
+extern struct platform_device u8500_b2r2_device;
+extern struct platform_device u5500_b2r2_device;
+extern struct platform_device u8500_trace_modem;
 extern struct platform_device ux500_hwmem_device;
 extern struct platform_device ux500_stm_device;
 extern struct amba_device ux500_pl031_device;
 
 extern struct platform_device ux500_hash1_device;
 extern struct platform_device ux500_cryp1_device;
+extern struct platform_device ux500_wdt_device;
+extern struct platform_device mloader_fw_device;
+extern struct platform_device u8500_thsens_device;
 
 extern struct platform_device u8500_dma40_device;
 extern struct platform_device ux500_ske_keypad_device;
diff --git a/arch/arm/mach-ux500/include/mach/ste-dma40-db5500.h b/arch/arm/mach-ux500/include/mach/ste-dma40-db5500.h
new file mode 100644
index 00000000000..cb2110c3285
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/ste-dma40-db5500.h
@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
+ * License terms: GNU General Public License (GPL) version 2
+ *
+ * DB5500-SoC-specific configuration for DMA40
+ */
+
+#ifndef STE_DMA40_DB5500_H
+#define STE_DMA40_DB5500_H
+
+#define DB5500_DMA_NR_DEV 64
+
+enum dma_src_dev_type {
+	DB5500_DMA_DEV0_SPI0_RX = 0,
+	DB5500_DMA_DEV1_SPI1_RX = 1,
+	DB5500_DMA_DEV2_SPI2_RX = 2,
+	DB5500_DMA_DEV3_SPI3_RX = 3,
+	DB5500_DMA_DEV4_USB_OTG_IEP_1_9 = 4,
+	DB5500_DMA_DEV5_USB_OTG_IEP_2_10 = 5,
+	DB5500_DMA_DEV6_USB_OTG_IEP_3_11 = 6,
+	DB5500_DMA_DEV7_IRDA_RFS = 7,
+	DB5500_DMA_DEV8_IRDA_FIFO_RX = 8,
+	DB5500_DMA_DEV9_MSP0_RX = 9,
+	DB5500_DMA_DEV10_MSP1_RX = 10,
+	DB5500_DMA_DEV11_MSP2_RX = 11,
+	DB5500_DMA_DEV12_UART0_RX = 12,
+	DB5500_DMA_DEV13_UART1_RX = 13,
+	DB5500_DMA_DEV14_UART2_RX = 14,
+	DB5500_DMA_DEV15_UART3_RX = 15,
+	DB5500_DMA_DEV16_USB_OTG_IEP_8 = 16,
+	DB5500_DMA_DEV17_USB_OTG_IEP_1_9 = 17,
+	DB5500_DMA_DEV18_USB_OTG_IEP_2_10 = 18,
+	DB5500_DMA_DEV19_USB_OTG_IEP_3_11 = 19,
+	DB5500_DMA_DEV20_USB_OTG_IEP_4_12 = 20,
+	DB5500_DMA_DEV21_USB_OTG_IEP_5_13 = 21,
+	DB5500_DMA_DEV22_USB_OTG_IEP_6_14 = 22,
+	DB5500_DMA_DEV23_USB_OTG_IEP_7_15 = 23,
+	DB5500_DMA_DEV24_SDMMC0_RX = 24,
+	DB5500_DMA_DEV25_SDMMC1_RX = 25,
+	DB5500_DMA_DEV26_SDMMC2_RX = 26,
+	DB5500_DMA_DEV27_SDMMC3_RX = 27,
+	DB5500_DMA_DEV28_SDMMC4_RX = 28,
+	/* 29 - 32 not used */
+	DB5500_DMA_DEV33_SDMMC0_RX = 33,
+	DB5500_DMA_DEV34_SDMMC1_RX = 34,
+	DB5500_DMA_DEV35_SDMMC2_RX = 35,
+	DB5500_DMA_DEV36_SDMMC3_RX = 36,
+	DB5500_DMA_DEV37_SDMMC4_RX = 37,
+	DB5500_DMA_DEV38_USB_OTG_IEP_8 = 38,
+	DB5500_DMA_DEV39_USB_OTG_IEP_1_9 = 39,
+	DB5500_DMA_DEV40_USB_OTG_IEP_2_10 = 40,
+	DB5500_DMA_DEV41_USB_OTG_IEP_3_11 = 41,
+	DB5500_DMA_DEV42_USB_OTG_IEP_4_12 = 42,
+	DB5500_DMA_DEV43_USB_OTG_IEP_5_13 = 43,
+	DB5500_DMA_DEV44_USB_OTG_IEP_6_14 = 44,
+	DB5500_DMA_DEV45_USB_OTG_IEP_7_15 = 45,
+	/* 46 not used */
+	DB5500_DMA_DEV47_MCDE_RX = 47,
+	DB5500_DMA_DEV48_CRYPTO1_RX = 48,
+	/* 49, 50 not used */
+	DB5500_DMA_DEV49_I2C1_RX = 51,
+	DB5500_DMA_DEV50_I2C3_RX = 52,
+	DB5500_DMA_DEV51_I2C2_RX = 53,
+	/* 54 - 60 not used */
+	DB5500_DMA_DEV61_CRYPTO0_RX = 61,
+	/* 62, 63 not used */
+};
+
+enum dma_dest_dev_type {
+	DB5500_DMA_DEV0_SPI0_TX = 0,
+	DB5500_DMA_DEV1_SPI1_TX = 1,
+	DB5500_DMA_DEV2_SPI2_TX = 2,
+	DB5500_DMA_DEV3_SPI3_TX = 3,
+	DB5500_DMA_DEV4_USB_OTG_OEP_1_9 = 4,
+	DB5500_DMA_DEV5_USB_OTG_OEP_2_10 = 5,
+	DB5500_DMA_DEV6_USB_OTG_OEP_3_11 = 6,
+	DB5500_DMA_DEV7_IRRC_TX = 7,
+	DB5500_DMA_DEV8_IRDA_FIFO_TX = 8,
+	DB5500_DMA_DEV9_MSP0_TX = 9,
+	DB5500_DMA_DEV10_MSP1_TX = 10,
+	DB5500_DMA_DEV11_MSP2_TX = 11,
+	DB5500_DMA_DEV12_UART0_TX = 12,
+	DB5500_DMA_DEV13_UART1_TX = 13,
+	DB5500_DMA_DEV14_UART2_TX = 14,
+	DB5500_DMA_DEV15_UART3_TX = 15,
+	DB5500_DMA_DEV16_USB_OTG_OEP_8 = 16,
+	DB5500_DMA_DEV17_USB_OTG_OEP_1_9 = 17,
+	DB5500_DMA_DEV18_USB_OTG_OEP_2_10 = 18,
+	DB5500_DMA_DEV19_USB_OTG_OEP_3_11 = 19,
+	DB5500_DMA_DEV20_USB_OTG_OEP_4_12 = 20,
+	DB5500_DMA_DEV21_USB_OTG_OEP_5_13 = 21,
+	DB5500_DMA_DEV22_USB_OTG_OEP_6_14 = 22,
+	DB5500_DMA_DEV23_USB_OTG_OEP_7_15 = 23,
+	DB5500_DMA_DEV24_SDMMC0_TX = 24,
+	DB5500_DMA_DEV25_SDMMC1_TX = 25,
+	DB5500_DMA_DEV26_SDMMC2_TX = 26,
+	DB5500_DMA_DEV27_SDMMC3_TX = 27,
+	DB5500_DMA_DEV28_SDMMC4_TX = 28,
+	/* 29 - 31 not used */
+	DB5500_DMA_DEV32_FSMC_TX = 32,
+	DB5500_DMA_DEV33_SDMMC0_TX = 33,
+	DB5500_DMA_DEV34_SDMMC1_TX = 34,
+	DB5500_DMA_DEV35_SDMMC2_TX = 35,
+	DB5500_DMA_DEV36_SDMMC3_TX = 36,
+	DB5500_DMA_DEV37_SDMMC4_TX = 37,
+	DB5500_DMA_DEV38_USB_OTG_OEP_8 = 38,
+	DB5500_DMA_DEV39_USB_OTG_OEP_1_9 = 39,
+	DB5500_DMA_DEV40_USB_OTG_OEP_2_10 = 40,
+	DB5500_DMA_DEV41_USB_OTG_OEP_3_11 = 41,
+	DB5500_DMA_DEV42_USB_OTG_OEP_4_12 = 42,
+	DB5500_DMA_DEV43_USB_OTG_OEP_5_13 = 43,
+	DB5500_DMA_DEV44_USB_OTG_OEP_6_14 = 44,
+	DB5500_DMA_DEV45_USB_OTG_OEP_7_15 = 45,
+	/* 46 not used */
+	DB5500_DMA_DEV47_STM_TX = 47,
+	DB5500_DMA_DEV48_CRYPTO1_TX = 48,
+	DB5500_DMA_DEV49_CRYPTO1_TX_HASH1_TX = 49,
+	DB5500_DMA_DEV50_HASH1_TX = 50,
+	DB5500_DMA_DEV51_I2C1_TX = 51,
+	DB5500_DMA_DEV52_I2C3_TX = 52,
+	DB5500_DMA_DEV53_I2C2_TX = 53,
+	/* 54, 55 not used */
+	DB5500_DMA_MEMCPY_TX_1 = 56,
+	DB5500_DMA_MEMCPY_TX_2 = 57,
+	DB5500_DMA_MEMCPY_TX_3 = 58,
+	DB5500_DMA_MEMCPY_TX_4 = 59,
+	DB5500_DMA_MEMCPY_TX_5 = 60,
+	DB5500_DMA_DEV61_CRYPTO0_TX = 61,
+	DB5500_DMA_DEV62_CRYPTO0_TX_HASH0_TX = 62,
+	DB5500_DMA_DEV63_HASH0_TX = 63,
+};
+
+#endif
diff --git a/arch/arm/mach-ux500/mcde.c b/arch/arm/mach-ux500/mcde.c
index fe3b80f0961..e3514d1761b 100644
--- a/arch/arm/mach-ux500/mcde.c
+++ b/arch/arm/mach-ux500/mcde.c
@@ -53,12 +53,12 @@ static struct resource mcde_resources[] = {
 
 static int mcde_platform_enable(void)
 {
-	return prcmu_enable_mcde();
+	return prcmu_enable_dsipll();
 }
 
 static int mcde_platform_disable(void)
 {
-	return prcmu_disable_mcde();
+	return prcmu_disable_dsipll();
 }
 
 static void dev_release_noop(struct device *dev)