diff options
author | Vijaya Kumar Kilari <vijay.kilari@stericsson.com> | 2011-05-30 16:38:32 +0530 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@stericsson.com> | 2011-09-19 15:15:32 +0200 |
commit | 1b0ff28a0a2392c75f4b6f7cf9cc2ef680399c5f (patch) | |
tree | b652880a3a786e3457b33b3601b3a2ecae072faf /arch/arm/mach-ux500/include/mach/prcmu-db5500.h | |
parent | f89ebf3ef416dcdbe08e5ba97788a4587034b99c (diff) |
U5500: Add support for PLL and EPOD Power mgmt
PLL and EPOD support added in PRCMU driver
Regulator and clock framework driver updated
ST-Ericsson Linux next: -
ST-Ericsson ID: WP334772
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: I134fe00df12788476e840a9c3f44dc0e39570fa9
Signed-off-by: Vijaya Kumar K <vijay.kilari@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23962
Reviewed-by: Mattias NILSSON <mattias.i.nilsson@stericsson.com>
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500/include/mach/prcmu-db5500.h')
-rw-r--r-- | arch/arm/mach-ux500/include/mach/prcmu-db5500.h | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h index dc1f1fa8bb8..0d26f72230e 100644 --- a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h +++ b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h @@ -8,37 +8,6 @@ #ifndef __MACH_PRCMU_U5500_H #define __MACH_PRCMU_U5500_H -/* - * Clock identifiers. - */ -enum db5500_prcmu_clock { - DB5500_PRCMU_SGACLK, - DB5500_PRCMU_UARTCLK, - DB5500_PRCMU_MSP02CLK, - DB5500_PRCMU_I2CCLK, - DB5500_PRCMU_SDMMCCLK, - DB5500_PRCMU_PER1CLK, - DB5500_PRCMU_PER2CLK, - DB5500_PRCMU_PER3CLK, - DB5500_PRCMU_PER5CLK, - DB5500_PRCMU_PER6CLK, - DB5500_PRCMU_PWMCLK, - DB5500_PRCMU_IRDACLK, - DB5500_PRCMU_IRRCCLK, - DB5500_PRCMU_HDMICLK, - DB5500_PRCMU_APEATCLK, - DB5500_PRCMU_APETRACECLK, - DB5500_PRCMU_MCDECLK, - DB5500_PRCMU_DSIALTCLK, - DB5500_PRCMU_DMACLK, - DB5500_PRCMU_B2R2CLK, - DB5500_PRCMU_TVCLK, - DB5500_PRCMU_RNGCLK, - DB5500_PRCMU_NUM_REG_CLOCKS, - DB5500_PRCMU_SYSCLK = DB5500_PRCMU_NUM_REG_CLOCKS, - DB5500_PRCMU_TIMCLK, -}; - #ifdef CONFIG_UX500_SOC_DB5500 void db5500_prcmu_early_init(void); @@ -56,16 +25,6 @@ static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, return 0; } -static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) -{ - return 0; -} - -static inline int prcmu_request_clock(u8 clock, bool enable) -{ - return db5500_prcmu_request_clock(clock, enable); -} - static inline void prcmu_system_reset(u16 reset_code) {} #else /* !CONFIG_UX500_SOC_DB5500 */ |