diff options
author | Jurijs Soloveckis <jurijs.soloveckis@stericsson.com> | 2011-10-14 16:04:38 +0200 |
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committer | Jonas ABERG <jonas.aberg@stericsson.com> | 2011-10-19 16:14:58 +0200 |
commit | bdc0582300579fe811269c7c87e8cf44ad54a8f1 (patch) | |
tree | 4e7a97a6da9d6a8bca6792b4cb1f9a5cdb04b88a /arch | |
parent | 81dd6cb0d39741dff677da215788d9c7063064f4 (diff) |
ARM: u8500: API for PRCMU_GPIOCR register
The PRCMU_GPIOCR register modification within
STM driver is implemented via corresponding
API functions.
ST-Ericsson ID: 349677
ST-Ericsson Linux next: N/A
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: I7bbcf263b83338d7b05413dd9dc0ac2ec4880601
Depends-On: I5d3d0e069b0e8929b99fcfe9cb5e37a950caf716
Signed-off-by: Jurijs Soloveckis <jurijs.soloveckis@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33429
Reviewed-by: QATOOLS
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-ux500/board-mop500-stm.c | 19 |
1 files changed, 3 insertions, 16 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-stm.c b/arch/arm/mach-ux500/board-mop500-stm.c index 1c4ce12901f..962125db752 100644 --- a/arch/arm/mach-ux500/board-mop500-stm.c +++ b/arch/arm/mach-ux500/board-mop500-stm.c @@ -77,15 +77,9 @@ static int stm_ste_disable_ape_on_mipi60(void) /* * Manage STM output pins connection (MIP34/MIPI60 connectors) */ -#define PRCM_GPIOCR (_PRCMU_BASE + 0x138) -#define PRCM_GPIOCR_DBG_STM_MOD_CMD1 0x800 -#define PRCM_GPIOCR_DBG_UARTMOD_CMD0 0x1 - - static int stm_ste_connection(enum stm_connection_type con_type) { int retval = -EINVAL; - u32 gpiocr = readl(PRCM_GPIOCR); if (con_type != STM_DISCONNECT) { /* Always enable MIPI34 GPIO pins */ @@ -101,26 +95,19 @@ static int stm_ste_connection(enum stm_connection_type con_type) case STM_DEFAULT_CONNECTION: case STM_STE_MODEM_ON_MIPI34_NONE_ON_MIPI60: /* Enable altC3 on GPIO70-74 (STMMOD) & GPIO75-76 (UARTMOD) */ - gpiocr |= (PRCM_GPIOCR_DBG_STM_MOD_CMD1 - | PRCM_GPIOCR_DBG_UARTMOD_CMD0); - writel(gpiocr, PRCM_GPIOCR); + prcmu_enable_stm_mod_uart(); retval = stm_ste_disable_ape_on_mipi60(); break; case STM_STE_APE_ON_MIPI34_NONE_ON_MIPI60: /* Disable altC3 on GPIO70-74 (STMMOD) & GPIO75-76 (UARTMOD) */ - gpiocr &= ~(PRCM_GPIOCR_DBG_STM_MOD_CMD1 - | PRCM_GPIOCR_DBG_UARTMOD_CMD0); - writel(gpiocr, PRCM_GPIOCR); + prcmu_disable_stm_mod_uart(); retval = stm_ste_disable_ape_on_mipi60(); break; case STM_STE_MODEM_ON_MIPI34_APE_ON_MIPI60: /* Enable altC3 on GPIO70-74 (STMMOD) and GPIO75-76 (UARTMOD) */ - gpiocr |= (PRCM_GPIOCR_DBG_STM_MOD_CMD1 - | PRCM_GPIOCR_DBG_UARTMOD_CMD0); - writel(gpiocr, PRCM_GPIOCR); - + prcmu_enable_stm_mod_uart(); /* Enable APE on MIPI60 */ retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins)); if (retval) |