diff options
| -rw-r--r-- | arch/x86/kernel/apic_64.c | 4 | ||||
| -rw-r--r-- | arch/x86/kernel/vsmp_64.c | 27 | ||||
| -rw-r--r-- | include/asm-x86/apic.h | 5 |
3 files changed, 28 insertions, 8 deletions
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c index ac2405ed504..f6eb01d8923 100644 --- a/arch/x86/kernel/apic_64.c +++ b/arch/x86/kernel/apic_64.c @@ -1182,9 +1182,9 @@ __cpuinit int apic_is_clustered_box(void) * there is not this kind of box with AMD CPU yet. * Some AMD box with quadcore cpu and 8 sockets apicid * will be [4, 0x23] or [8, 0x27] could be thought to - * have three apic_clusters. So go out early. + * vsmp box still need checking... */ - if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) + if (!is_vsmp_box() && (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)) return 0; bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr; diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c index 54202b1805d..a00961d42e7 100644 --- a/arch/x86/kernel/vsmp_64.c +++ b/arch/x86/kernel/vsmp_64.c @@ -72,19 +72,34 @@ static unsigned __init vsmp_patch(u8 type, u16 clobbers, void *ibuf, } +static int vsmp = -1; + +int is_vsmp_box(void) +{ + if (vsmp != -1) + return vsmp; + + vsmp = 0; + if (!early_pci_allowed()) + return vsmp; + + /* Check if we are running on a ScaleMP vSMP box */ + if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) == + (PCI_VENDOR_ID_SCALEMP || (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16))) + vsmp = 1; + + return vsmp; +} + void __init vsmp_init(void) { void *address; unsigned int cap, ctl, cfg; - if (!early_pci_allowed()) + if (!is_vsmp_box()) return; - /* Check if we are running on a ScaleMP vSMP box */ - if ((read_pci_config_16(0, 0x1f, 0, PCI_VENDOR_ID) != - PCI_VENDOR_ID_SCALEMP) || - (read_pci_config_16(0, 0x1f, 0, PCI_DEVICE_ID) != - PCI_DEVICE_ID_SCALEMP_VSMP_CTL)) + if (!early_pci_allowed()) return; /* If we are, use the distinguished irq functions */ diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h index bcfc07fd366..f0321a427e1 100644 --- a/include/asm-x86/apic.h +++ b/include/asm-x86/apic.h @@ -51,12 +51,17 @@ extern unsigned boot_cpu_id; */ #ifdef CONFIG_PARAVIRT #include <asm/paravirt.h> +extern int is_vsmp_box(void); #else #define apic_write native_apic_write #define apic_write_atomic native_apic_write_atomic #define apic_read native_apic_read #define setup_boot_clock setup_boot_APIC_clock #define setup_secondary_clock setup_secondary_APIC_clock +static int inline is_vsmp_box(void) +{ + return 0; +} #endif static inline void native_apic_write(unsigned long reg, u32 v) |